x32: Encode %esp as %rsp to avoid 0x67 prefix

Since the upper 32 bits of stack register are always zero for x32, we
can encode %esp as %rsp to avoid 0x67 prefix in address if there is no
index or base register.

gcc/

	PR target/82267
	* config/i386/i386.c (ix86_print_operand_address_as): Encode
	%esp as %rsp to avoid 0x67 prefix if there is no index or base
	register.

gcc/testsuite/

	PR target/82267
	* gcc.target/i386/pr82267.c: New test.

From-SVN: r253127

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 041e47feffe2e5edaf4b0abdee653b4968692303..b92347e66bed85037b1ea8dbd0a13f988eba7fe4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2017-09-24  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/82267
+       * config/i386/i386.c (ix86_print_operand_address_as): Encode
+       %esp as %rsp to avoid 0x67 prefix if there is no index or base
+       register.
+
 2017-09-23  Uros Bizjak  <ubizjak@gmail.com>
 
        PR bootstrap/82306

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7434aaebea2fe8abd60276074ceb5c7dc09b8d87..293287c8af48053bb8229557e175f6978f6623a1 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -19953,6 +19953,14 @@ ix86_print_operand_address_as (FILE *file, rtx addr,
          code = 'k';
        }
 
+      /* Since the upper 32 bits of RSP are always zero for x32, we can
+        encode %esp as %rsp to avoid 0x67 prefix if there is no index or
+        base register.  */
+      if (TARGET_X32 && Pmode == SImode
+         && ((!index && base && REGNO (base) == SP_REG)
+             || (!base && index && REGNO (index) == SP_REG)))
+       code = 'q';
+
       if (ASSEMBLER_DIALECT == ASM_ATT)
        {
          if (disp)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 21e6e2df02823c21c9d27606318ec548ee7f9996..18c4a26c2f5ad5571bcf26358b5b759bd59fbe01 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-09-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/82267
+       * gcc.target/i386/pr82267.c: New test.
+
 2017-09-24  Thomas Koenig  <tkoenig@gcc.gnu.org>
        PR fortran/66328
 

diff --git a/gcc/testsuite/gcc.target/i386/pr82267.c b/gcc/testsuite/gcc.target/i386/pr82267.c
new file mode 100644 (file)
index 0000000..5e4b271
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82267.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-require-effective-target maybe_x32 } */
+/* { dg-options "-O2 -mx32 -maddress-mode=short" } */
+
+int
+stackuse (void)
+{
+  volatile int foo = 2;
+  return foo * 3;
+}
+
+/* Verify we that use %rsp to access stack.  */
+/* { dg-final { scan-assembler-not "%esp" } } */
+/* { dg-final { scan-assembler "%rsp" } } */