* sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
authorJ.T. Conklin <jtc@acorntoolworks.com>
Mon, 4 Dec 1995 20:32:44 +0000 (20:32 +0000)
committerJ.T. Conklin <jtc@acorntoolworks.com>
Mon, 4 Dec 1995 20:32:44 +0000 (20:32 +0000)
(sh_table): Added many SH3 opcodes.
* sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.

opcodes/ChangeLog
opcodes/sh-dis.c
opcodes/sh-opc.h

index 3c6f5c0c40e93cc227001fb854a5259efaa315d4..645e5d2528e3480864fa258bd16b242d39e63b13 100644 (file)
@@ -1,3 +1,9 @@
+Mon Dec  4 12:29:05 1995  J.T. Conklin  <jtc@rtl.cygnus.com>
+
+       * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
+       (sh_table): Added many SH3 opcodes.
+       * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
+
 Fri Dec  1 07:42:18 1995  Michael Meissner  <meissner@tiktok.cygnus.com>
 
        * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
index 65570baf5c3379889562cc6a891c0e2d50860d25..ce6cad35d19d905d419789c7efba2ceefe75ec38 100644 (file)
@@ -142,7 +142,7 @@ print_insn_shx(memaddr, info)
       }
     ok:
       fprintf(stream,"%s\t", op->name);
-      for (n = 0; n < 2 && op->arg[n] != A_END; n++) 
+      for (n = 0; n < 3 && op->arg[n] != A_END; n++) 
        {
          if (n && op->arg[1] != A_END)
            fprintf(stream,",");
@@ -212,6 +212,12 @@ print_insn_shx(memaddr, info)
            case A_VBR:
              fprintf(stream,"vbr");
              break;
+           case A_SSR:
+             fprintf(stream,"ssr");
+             break;
+           case A_SPC:
+             fprintf(stream,"spc");
+             break;
            case A_MACH:
              fprintf(stream,"mach");
              break;
@@ -236,6 +242,9 @@ print_insn_shx(memaddr, info)
            case FPUL_N:
              fprintf(stream,"fpul");
              break;
+           case F_FR0:
+             fprintf(stream,"fr0");
+             break;
 /* end-sanitize-sh3e */
            default:
              abort();
index bf76f1c59e0238881fe4e412e048929cb9803667..e9dce85797717847c6d604a200b4061981b04323 100644 (file)
@@ -75,9 +75,12 @@ typedef enum {
        A_REG_N,
        A_SR,
        A_VBR,
+       A_SSR,
+       A_SPC,
 /* start-sanitize-sh3e */
        F_REG_N,
        F_REG_M,
+       F_FR0,
        FPUL_N,
        FPUL_M,
        FPSCR_N,
@@ -87,7 +90,7 @@ typedef enum {
 
 typedef struct {
   char *name;
-  sh_arg_type arg[3];
+  sh_arg_type arg[4];
   sh_nibble_type nibbles[4];
 } sh_opcode_info;
 
@@ -123,6 +126,8 @@ sh_opcode_info sh_table[] = {
 
 /* 0000000000101000 clrmac              */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}},
 
+/* 0000000001001000 clrs                */{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}},
+
 /* 0000000000001000 clrt                */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}},
 
 /* 10001000i8*1.... cmp/eq #<imm>,R0    */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}},
@@ -161,18 +166,26 @@ sh_opcode_info sh_table[] = {
 
 /* 0100nnnn00001011 jsr @<REG_N>        */{"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}},
 
-/* 0100nnnn00011110 ldc <REG_N>,GBR     */{"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
-
 /* 0100nnnn00001110 ldc <REG_N>,SR      */{"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}},
 
+/* 0100nnnn00011110 ldc <REG_N>,GBR     */{"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
+
 /* 0100nnnn00101110 ldc <REG_N>,VBR     */{"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}},
 
-/* 0100nnnn00010111 ldc.l @<REG_N>+,GBR */{"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
+/* 0100nnnn00111110 ldc <REG_N>,SSR     */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}},
+
+/* 0100nnnn01001110 ldc <REG_N>,SPC     */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}},
 
 /* 0100nnnn00000111 ldc.l @<REG_N>+,SR  */{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}},
 
+/* 0100nnnn00010111 ldc.l @<REG_N>+,GBR */{"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
+
 /* 0100nnnn00100111 ldc.l @<REG_N>+,VBR */{"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}},
 
+/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}},
+
+/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}},
+
 /* 0100nnnn00001010 lds <REG_N>,MACH    */{"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}},
 
 /* 0100nnnn00011010 lds <REG_N>,MACL    */{"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}},
@@ -197,6 +210,8 @@ sh_opcode_info sh_table[] = {
 /* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}},
 /* end-sanitize-sh3e */
 
+/* 0000000000111000 ldtlb               */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}},
+
 /* 0100nnnnmmmm1111 mac.w @<REG_M>+,@<REG_N>+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}},
 
 /* 1110nnnni8*1.... mov #<imm>,<REG_N>  */{"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}},
@@ -303,6 +318,7 @@ sh_opcode_info sh_table[] = {
 
 /* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}},
 
+/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}},
 /* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
 
 /* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}},
@@ -331,18 +347,26 @@ sh_opcode_info sh_table[] = {
 
 /* 0000000000011011 sleep               */{"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
 
-/* 0000nnnn00010010 stc GBR,<REG_N>     */{"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
-
 /* 0000nnnn00000010 stc SR,<REG_N>      */{"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}},
 
+/* 0000nnnn00010010 stc GBR,<REG_N>     */{"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
+
 /* 0000nnnn00100010 stc VBR,<REG_N>     */{"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}},
 
-/* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
+/* 0000nnnn00110010 stc SSR,<REG_N>     */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}},
+
+/* 0000nnnn01000010 stc SPC,<REG_N>     */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}},
 
 /* 0100nnnn00000011 stc.l SR,@-<REG_N>  */{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}},
 
+/* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
+
 /* 0100nnnn00100011 stc.l VBR,@-<REG_N> */{"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}},
 
+/* 0100nnnn00110011 stc.l SSR,@-<REG_N> */{"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}},
+
+/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}},
+
 /* 0000nnnn00001010 sts MACH,<REG_N>    */{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}},
 
 /* 0000nnnn00011010 sts MACL,<REG_N>    */{"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
@@ -424,11 +448,11 @@ sh_opcode_info sh_table[] = {
 
 /* 1111nnnn10011101 fldi1 <F_REG_N>    */{"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}},
 
-/* 1111nnnn00011101 flds <F_REG_M>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
+/* 1111nnnn00011101 flds <F_REG_N>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
 
 /* 1111nnnn00101101 float FPUL,<F_REG_N>*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}},
 
-/* 1111nnnnmmmm1110 fmac <F_REG_M>,<F_REG_N>*/{"fmac",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
+/* 1111nnnnmmmm1110 fmac FR0,<F_REG_M>,<F_REG_N>*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
 
 /* 1111nnnnmmmm1100 fmov <F_REG_M>,<F_REG_N>*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},