Fix a bug in clk2fflogic memory handling

diff --git a/passes/sat/clk2fflogic.cc b/passes/sat/clk2fflogic.cc
index d334cf7d99130e39aa6c6ab5a2e378ea158c6831..7e952e99b4600740a13f521dda6d51162933b517 100644 (file)
--- a/passes/sat/clk2fflogic.cc
+++ b/passes/sat/clk2fflogic.cc
@@ -126,7 +126,7 @@ struct Clk2fflogicPass : public Pass {
 
                                                SigSpec clock_edge = module->Eqx(NEW_ID, {clk, SigSpec(past_clk)}, clock_edge_pattern);
 
-                                               SigSpec en_q = module->addWire(NEW_ID, GetSize(addr));
+                                               SigSpec en_q = module->addWire(NEW_ID, GetSize(en));
                                                module->addFf(NEW_ID, en, en_q);
 
                                                SigSpec addr_q = module->addWire(NEW_ID, GetSize(addr));