arm: Add vst1_bf16 + vst1q_bf16 intrinsics
authorAndrea Corallo <andrea.corallo@arm.com>
Thu, 29 Oct 2020 14:11:37 +0000 (15:11 +0100)
committerAndrea Corallo <andrea.corallo@arm.com>
Tue, 3 Nov 2020 13:21:27 +0000 (14:21 +0100)
gcc/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics.
* config/arm/arm_neon_builtins.def : Touch for:
__builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf.

gcc/testsuite/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/simd/vst1_bf16_1.c: New test.

gcc/config/arm/arm_neon.h
gcc/config/arm/arm_neon_builtins.def
gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c [new file with mode: 0644]

index b77175eaa3e9b32c260934c795f7689433d2d882..24aad3370f68a591a6186f2fd38b5bd22db42be8 100644 (file)
@@ -19509,6 +19509,20 @@ vbfmlaltq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
   return __builtin_neon_vfmat_laneqv8bf (__r, __a, __b, __index);
 }
 
+__extension__ extern __inline void
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vst1_bf16 (bfloat16_t * __a, bfloat16x4_t __b)
+{
+  __builtin_neon_vst1v4bf (__a, __b);
+}
+
+__extension__ extern __inline void
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_bf16 (bfloat16_t * __a, bfloat16x8_t __b)
+{
+  __builtin_neon_vst1v8bf (__a, __b);
+}
+
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vst2_bf16 (bfloat16_t * __ptr, bfloat16x4x2_t __val)
index 07eda44cc5874b099e3d844ed16310a760135e45..e3ab628149754bf858a8f39947d60a867f1c2f4a 100644 (file)
@@ -317,8 +317,9 @@ VAR12 (LOAD1LANE, vld1_lane,
        v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di, v4bf, v8bf)
 VAR10 (LOAD1, vld1_dup,
        v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
-VAR12 (STORE1, vst1,
-       v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
+VAR14 (STORE1, vst1,
+        v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di,
+        v4bf, v8bf)
 VAR14 (STORE1LANE, vst1_lane,
        v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di, v4bf, v8bf)
 VAR13 (LOAD1, vld2,
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c
new file mode 100644 (file)
index 0000000..06fb58e
--- /dev/null
@@ -0,0 +1,29 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" }  */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon.h"
+
+/*
+**test_vst1_bf16:
+**     vst1.16 {d0}, \[r0\]
+**     bx      lr
+*/
+void
+test_vst1_bf16 (bfloat16_t *a, bfloat16x4_t b)
+{
+  vst1_bf16 (a, b);
+}
+
+/*
+**test_vst1q_bf16:
+**     vst1.16 {d0-d1}, \[r0\]
+**     bx      lr
+*/
+void
+test_vst1q_bf16 (bfloat16_t *a, bfloat16x8_t b)
+{
+  vst1q_bf16 (a, b);
+}