r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
+ r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
+
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
}
r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
+ r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
+
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
}
#define R_028238_CB_TARGET_MASK 0x00028238
#define R_02823C_CB_SHADER_MASK 0x0002823C
#define R_028350_SX_MISC 0x00028350
+#define R_028354_SX_SURFACE_SYNC 0x00028354
+#define S_028354_SURFACE_SYNC_MASK(x) (((x) & 0x1FF) << 0)
#define R_028380_SQ_VTX_SEMANTIC_0 0x00028380
#define R_028384_SQ_VTX_SEMANTIC_1 0x00028384
#define R_028388_SQ_VTX_SEMANTIC_2 0x00028388
r600_store_context_reg(cb, R_0288A4_SQ_PGM_RESOURCES_FS, 0);
r600_store_context_reg(cb, R_0288DC_SQ_PGM_CF_OFFSET_FS, 0);
+ if (rctx->chip_class == R700)
+ r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
+
r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0, 0x1000FFF);
r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x1000FFF);
}
#define S_028350_MULTIPASS(x) (((x) & 0x1) << 0)
#define G_028350_MULTIPASS(x) (((x) >> 0) & 0x1)
#define C_028350_MULTIPASS 0xFFFFFFFE
+#define R_028354_SX_SURFACE_SYNC 0x028354
+#define S_028354_SURFACE_SYNC_MASK(x) (((x) & 0x1FF) << 0)
#define R_028380_SQ_VTX_SEMANTIC_0 0x028380
#define S_028380_SEMANTIC_ID(x) (((x) & 0xFF) << 0)
#define G_028380_SEMANTIC_ID(x) (((x) >> 0) & 0xFF)