altivec.md: Fix argument swizzle in vec_doublel support...

gcc/ChangeLog:

2017-06-07  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.md: Fix argument swizzle in vec_doublel
	support, Generate	doublehv for signed int/float for BE case only.

From-SVN: r248996

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index efe7d11a5e5725caebb21046ca06b328abd69db4..ffa013214dce26b20120f754d80a1582f4592e59 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-07  Carl Love  <cel@us.ibm.com>
+
+       * config/rs6000/altivec.md: Fix argument swizzle in vec_doublel
+       support, Generate       doublehv for signed int/float for BE case only.
+
 2017-06-07  Alexander Monakov  <amonakov@ispras.ru>
 
        * doc/invoke.texi (mcx16): Rewrite.

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 404cc4eb8aca485cdd850c8de79b71cbf4c30a50..9e592bce393389db727465d251356c79c555e1fd 100644 (file)
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3003,8 +3003,8 @@
                                         operands[1], rtx_val));
 
       rtx_val = GEN_INT (8);
-      emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, operands[1],
-                                        rtx_tmp, rtx_val));
+      emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, rtx_tmp,
+                                        operands[1],rtx_val));
       emit_insn (gen_vsx_xvcv<VS_sxwsp>dp (operands[0], rtx_tmp));
     }
   else