radeonsi: fix EXPLICIT_FLUSH for flush offsets > 0
authorMarek Olšák <marek.olsak@amd.com>
Fri, 1 Feb 2019 22:10:46 +0000 (17:10 -0500)
committerMarek Olšák <marek.olsak@amd.com>
Mon, 11 Feb 2019 17:35:06 +0000 (12:35 -0500)
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_buffer.c

index bac561de2cb550b439a3efbc451200fdb7534370..c01118ce96a2745fa554e12ab9f3f8efe985577f 100644 (file)
@@ -525,10 +525,13 @@ static void si_buffer_do_flush_region(struct pipe_context *ctx,
        struct si_resource *buf = si_resource(transfer->resource);
 
        if (stransfer->staging) {
+               unsigned src_offset = stransfer->offset +
+                                     transfer->box.x % SI_MAP_BUFFER_ALIGNMENT +
+                                     (box->x - transfer->box.x);
+
                /* Copy the staging buffer into the original one. */
                si_copy_buffer((struct si_context*)ctx, transfer->resource,
-                              &stransfer->staging->b.b, box->x,
-                              stransfer->offset + box->x % SI_MAP_BUFFER_ALIGNMENT,
+                              &stransfer->staging->b.b, box->x, src_offset,
                               box->width);
        }