(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 554966aacceea8dbb0445f5b2b8f0e1839171883..848c2e8c446d86c8fa075d9c2c78b6a2c4a323e2 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -738,5 +738,16 @@ well-defined workloads, expressed as a perfecly normal
 sequential program, compiled to a standard well-known ISA, to have
 the potential of being offloaded transparently to Parallel Compute Engines,
 all without the Software Developer being excessively burdened with
-a Programming Paradigm that is alien to both their experience and training,
-as well as common knowledge.
+a Parallel-Processing Paradigm that is alien to both their experience
+and training, as well as common knowledge.
+
+Will it be that easy? ZOLC is, honestly, in its current incarnation,
+not that straightforward: programs
+have to be "massaged" by tools that insert intrinsics into the
+source code, in order to identify the Basic Blocks that the Zero-Overhead
+Loops can run. Can this be merged into standard gcc and llvm
+compilers? As intrinsics: of course. Can it become part of auto-vectorisation? Probably,
+if an infinite supply of money and engineering time is thrown at it.
+Is a half-way-house solution of compiler intrinsics good enough?
+Intel, ARM, MIPS, Power ISA and RISC-V have all already said "yes" on that,
+for several decades, and advanced programmers are comfortable with it.