* Optimal hardware path for blitting pixels.
* Scaling, format conversion, up- and downsampling (resolve) are allowed.
*/
-void
+bool
fd_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
{
struct fd_context *ctx = fd_context(pctx);
struct pipe_blit_info info = *blit_info;
if (info.render_condition_enable && !fd_render_condition_check(pctx))
- return;
+ return true;
if (ctx->blit && ctx->blit(ctx, &info))
- return;
+ return true;
if (info.mask & PIPE_MASK_S) {
DBG("cannot blit stencil, skipping");
DBG("blit unsupported %s -> %s",
util_format_short_name(info.src.resource->format),
util_format_short_name(info.dst.resource->format));
- return;
+ return false;
}
- fd_blitter_blit(ctx, &info);
+ return fd_blitter_blit(ctx, &info);
}
/**
unsigned src_level,
const struct pipe_box *src_box);
-void fd_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
+bool fd_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
#endif /* FREEDRENO_BLIT_H_ */
struct pipe_context *pctx = &ctx->base;
/* TODO size threshold too?? */
- if (!fallback) {
- /* do blit on gpu: */
- pctx->blit(pctx, blit);
- } else {
+ if (fallback || !fd_blit(pctx, blit)) {
/* do blit on cpu: */
util_resource_copy_region(pctx,
blit->dst.resource, blit->dst.level, blit->dst.box.x,
pos_out[1] = ptr[sample_index][1] / 16.0f;
}
+static void
+fd_blit_pipe(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
+{
+ /* wrap fd_blit to return void */
+ fd_blit(pctx, blit_info);
+}
+
void
fd_resource_context_init(struct pipe_context *pctx)
{
pctx->create_surface = fd_create_surface;
pctx->surface_destroy = fd_surface_destroy;
pctx->resource_copy_region = fd_resource_copy_region;
- pctx->blit = fd_blit;
+ pctx->blit = fd_blit_pipe;
pctx->flush_resource = fd_flush_resource;
pctx->invalidate_resource = fd_invalidate_resource;
pctx->get_sample_position = fd_get_sample_position;