# Why in the 2020s would you invent a new Vector ISA
+*The short answer: you don't. Leverage and exploit existing technology*
+
Inventing a new Scalar ISA from scratch is over a decade-long task
including simulators and compilers: OpenRISC 1200 took 12 years to
mature. A Vector or Packed SIMD ISA to reach stable *general-purpose*
Aspex Microelectronics, Elixent, these are parallel processing companies
that very few have heard of, because their software stack was so
specialist that it required heavy investment by customers to utilise.
-D-Matrix and Graphcore are a modern incarnation of the exact same
+D-Matrix, a Systolic Array Processor, is a modern incarnation of the exact same
"specialist parallel processing" mistake, betting heavily on AI with
Matrix and Convolution Engines that can do no other task. Aspex only
survived by being bought by Ericsson, where its specialised suitability
for massive wide Baseband FFTs saved it from going under.
The huge risk is that any "better
AI mousetrap" created by an innovative competitor
-that comes along will quickly render both D-Matrix and
-Graphcore's approach obsolete.
+that comes along will quickly render the D-Matrix approach obsolete.
NVIDIA and other GPUs have taken a different approach again: massive
parallelism with more Turing-complete ISAs in each, and dedicated