radeonsi/gfx10: finish up Navi14, add PCI ID
authorMarek Olšák <marek.olsak@amd.com>
Tue, 20 Aug 2019 22:57:36 +0000 (18:57 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 27 Aug 2019 20:16:08 +0000 (16:16 -0400)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
include/pci_ids/radeonsi_pci_ids.h
src/gallium/drivers/radeonsi/si_pipe.c

index fc545a1af0c75a4a6e5b9485acd9a8304911f56b..6de361024c0f39832f3bf8553d251063fef56e5d 100644 (file)
@@ -267,3 +267,5 @@ CHIPSET(0x7319, NAVI10)
 CHIPSET(0x731A, NAVI10)
 CHIPSET(0x731B, NAVI10)
 CHIPSET(0x731F, NAVI10)
+
+CHIPSET(0x7340, NAVI14)
index 260fafaeb9cf115c85ffcd8af391db7f487ca3eb..a0ad77435cb1e87e9d20adaa933807872db9c780 100644 (file)
@@ -1122,7 +1122,8 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
 #include "si_debug_options.h"
        }
 
-       sscreen->use_ngg = sscreen->info.chip_class >= GFX10;
+       sscreen->use_ngg = sscreen->info.chip_class >= GFX10 &&
+                          sscreen->info.family != CHIP_NAVI14;
        sscreen->use_ngg_streamout = false;
 
        /* Only enable primitive binning on APUs by default. */