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i965: Fix gen6 WM push constants updates.
author
Eric Anholt
<eric@anholt.net>
Fri, 8 Oct 2010 18:33:40 +0000
(11:33 -0700)
committer
Eric Anholt
<eric@anholt.net>
Fri, 8 Oct 2010 18:59:19 +0000
(11:59 -0700)
We would compute a new buffer, but never point the hardware at the new
buffer. This partially fixes glsl-routing, as now it get the updated
uniform for which attribute to draw.
src/mesa/drivers/dri/i965/gen6_wm_state.c
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diff --git
a/src/mesa/drivers/dri/i965/gen6_wm_state.c
b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index d88c86a1b259d32e0711715ac266de7432e2ccc3..4a9df48ea4c501620facb9fcb8d0b5c9723f3086 100644
(file)
--- a/
src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/
src/mesa/drivers/dri/i965/gen6_wm_state.c
@@
-173,7
+173,8
@@
upload_wm_state(struct brw_context *brw)
const struct brw_tracked_state gen6_wm_state = {
.dirty = {
- .mesa = _NEW_LINE | _NEW_POLYGONSTIPPLE | _NEW_COLOR,
+ .mesa = (_NEW_LINE | _NEW_POLYGONSTIPPLE | _NEW_COLOR |
+ _NEW_PROGRAM_CONSTANTS),
.brw = (BRW_NEW_CURBE_OFFSETS |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_NR_WM_SURFACES |