ir_expression *expr = ir->condition->as_expression();
if (expr) {
- fs_reg op[2];
+ fs_reg op[3];
fs_inst *inst;
fs_reg temp;
- assert(expr->get_num_operands() <= 2);
+ assert(expr->get_num_operands() <= 3);
for (unsigned int i = 0; i < expr->get_num_operands(); i++) {
assert(expr->operands[i]->type->is_scalar());
emit(IF(op[0], op[1],
brw_conditional_for_comparison(expr->operation)));
return;
+
+ case ir_triop_csel: {
+ /* Expand the boolean condition into the flag register. */
+ fs_inst *inst = emit(MOV(reg_null_d, op[0]));
+ inst->conditional_mod = BRW_CONDITIONAL_NZ;
+
+ /* Select which boolean to use as the result. */
+ fs_reg temp(this, expr->operands[1]->type);
+ inst = emit(SEL(temp, op[1], op[2]));
+ inst->predicate = BRW_PREDICATE_NORMAL;
+
+ emit(IF(temp, fs_reg(0), BRW_CONDITIONAL_NZ));
+ return;
+ }
+
default:
unreachable("not reached");
}
ir_expression *expr = ir->condition->as_expression();
if (expr) {
- src_reg op[2];
+ src_reg op[3];
dst_reg temp;
- assert(expr->get_num_operands() <= 2);
+ assert(expr->get_num_operands() <= 3);
for (unsigned int i = 0; i < expr->get_num_operands(); i++) {
expr->operands[i]->accept(this);
op[i] = this->result;
emit(IF(BRW_PREDICATE_ALIGN16_ANY4H));
return;
+ case ir_triop_csel: {
+ /* Expand the boolean condition into the flag register. */
+ vec4_instruction *inst = emit(MOV(dst_null_d(), op[0]));
+ inst->conditional_mod = BRW_CONDITIONAL_NZ;
+
+ /* Select which boolean to return. */
+ dst_reg temp(this, expr->operands[1]->type);
+ inst = emit(BRW_OPCODE_SEL, temp, op[1], op[2]);
+ inst->predicate = BRW_PREDICATE_NORMAL;
+
+ emit(IF(src_reg(temp), src_reg(0), BRW_CONDITIONAL_NZ));
+ return;
+ }
+
default:
unreachable("not reached");
}