formatting

diff --git a/3d_gpu/architecture/tomasulo_transformation.mdwn b/3d_gpu/architecture/tomasulo_transformation.mdwn
index 3622a21a44e93976fe2f81337516551584a33139..a93113bcb8092060476d185b2a1dcd500d03db55 100644 (file)
--- a/3d_gpu/architecture/tomasulo_transformation.mdwn
+++ b/3d_gpu/architecture/tomasulo_transformation.mdwn
@@ -2,7 +2,6 @@
 
 See [discussion](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006747.html)
 
-'''
 On Saturday, May 16, 2020, Yehowshua <yimmanuel3@gatech.edu> wrote:
 > This is a very intricate and complicated subject matter for sure.
 
@@ -130,4 +129,3 @@ proper stratification and design of the register files, massive Vector
 parallelism at the pipelines would be kept fully occupied without an
 overwhelming increase in gates or power consumption that would normally
 be expected, and scalar performance would be similarly high as well.
-'''