Support saving saved regs with multiple stores in addition to store multiple instruct...

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index f0bf658dae421ad6e4584ec437c2b5c0747f9298..8110f06547acdd9f1741da0ef123d4a44f801c4d 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,9 @@
+Fri Mar  3 12:33:24 1995  Michael Meissner  <meissner@tiktok.cygnus.com>
+
+       * rs6000-tdep.c (skip_prologue): Skip multiple stores of the saved
+       registers that GCC emits on the PowerPC by default in addition to
+       the store multiple instruction used on the Power series.
+
 Fri Mar  3 00:54:58 1995  Doug Evans  <dje@canuck.cygnus.com>
 
        * sparc-tdep.c (decode_asi): New function.

diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 6b1353ace37c5978df4b385b3cf97c0843b60a6e..8a21d54fb15dc22723a8913595204cc6b8a09c24 100644 (file)
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -209,25 +209,28 @@ CORE_ADDR pc;
        If the next is not a nop, this branch was part of the function
        prologue. */
 
-    if (op == 0x4def7b82 ||            /* crorc 15, 15, 15 */
+    if (op == 0x4def7b82 ||                    /* crorc 15, 15, 15 */
        op == 0x0)
-      return pc - 4;                   /* don't skip over this branch */
+      return pc - 4;                           /* don't skip over this branch */
   }
 
-  if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
-    pc += 4;                            /* store floating register double */
+  if ((op & 0xfc1f0000) == 0xd8010000) {       /* stfd Rx,NUM(r1) */
+    pc += 4;                                   /* store floating register double */
     op = read_memory_integer (pc, 4);
   }
 
-  if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
+  if ((op & 0xfc1f0000) == 0xbc010000) {       /* stm Rx, NUM(r1) */
     pc += 4;
     op = read_memory_integer (pc, 4);
   }
 
-  while (((tmp = op >> 16) == 0x9001) || /* st   r0, NUM(r1) */
-        (tmp == 0x9421) ||             /* stu  r1, NUM(r1) */
-        (tmp == 0x93e1))               /* st   r31,NUM(r1) */
-  {
+  while ((op & 0xfc1f0000) == 0x9001 &&        /* st rx,NUM(r1), rx >= r13 */
+        (op & 0x03e00000) >= 0x01a00000) {
+    pc += 4;
+    op = read_memory_integer (pc, 4);
+  }
+        
+  if ((op & 0xfc1f0000) == 0x94210000) {       /* stu r1,NUM(r1) */
     pc += 4;
     op = read_memory_integer (pc, 4);
   }