{
const VkPipelineVertexInputStateCreateInfo *vi_info =
pCreateInfo->pVertexInputState;
- struct radv_vertex_elements_info *velems = &pipeline->vertex_elements;
-
- for (uint32_t i = 0; i < vi_info->vertexAttributeDescriptionCount; i++) {
- const VkVertexInputAttributeDescription *desc =
- &vi_info->pVertexAttributeDescriptions[i];
- unsigned loc = desc->location;
- const struct vk_format_description *format_desc;
-
- format_desc = vk_format_description(desc->format);
-
- velems->format_size[loc] = format_desc->block.bits / 8;
- }
for (uint32_t i = 0; i < vi_info->vertexBindingDescriptionCount; i++) {
const VkVertexInputBindingDescription *desc =
uint8_t incr;
};
-struct radv_vertex_elements_info {
- uint32_t format_size[MAX_VERTEX_ATTRIBS];
-};
-
struct radv_ia_multi_vgt_param_helpers {
uint32_t base;
bool partial_es_wave;
uint32_t ctx_cs_hash;
struct radeon_cmdbuf ctx_cs;
- struct radv_vertex_elements_info vertex_elements;
-
uint32_t binding_stride[MAX_VBS];
uint8_t num_vertex_bindings;