pan/bifrost: Sync disassembler with Ryan's tree
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 14 Aug 2019 19:19:01 +0000 (12:19 -0700)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 14 Aug 2019 22:54:07 +0000 (22:54 +0000)
The disassembler was updated to move common code with the compiler into
a shared header. Additional, some new ops and control registers relating
to rounding were added.

Signed-off-by: Ryan Houdek <Sonicadvance1@gmail.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/panfrost/bifrost/bifrost_ops.h [new file with mode: 0644]
src/panfrost/bifrost/disassemble.c
src/panfrost/bifrost/disassemble.h

diff --git a/src/panfrost/bifrost/bifrost_ops.h b/src/panfrost/bifrost/bifrost_ops.h
new file mode 100644 (file)
index 0000000..96aff30
--- /dev/null
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2019 Ryan Houdek <Sonicadvance1@gmail.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef __bifrost_ops_h__
+#define __bifrost_ops_h__
+
+enum bifrost_ir_ops {
+        op_fma_f32 = 0x0,
+        op_fmul_f32,
+        op_fadd_f32,
+        op_frcp_fast_f32,
+        op_max_f32,
+        op_min_f32,
+        op_add_i32,
+        op_sub_i32,
+        op_imad,
+        op_mul_i32,
+        op_or_i32,
+        op_and_i32,
+        op_lshift_i32,
+        op_xor_i32,
+        op_rshift_i32,
+        op_arshift_i32,
+        op_csel_i32,
+        op_imin3_i32,
+        op_umin3_i32,
+        op_imax3_i32,
+        op_umax3_i32,
+
+        op_branch,
+
+        // unary
+        op_trunc,
+        op_ceil,
+        op_floor,
+        op_round,
+        op_roundeven,
+
+        op_mov,
+        op_movi,
+
+        op_ld_ubo_v1,
+        op_ld_ubo_v2,
+        op_ld_ubo_v3,
+        op_ld_ubo_v4,
+
+        op_ld_attr_v1,
+        op_ld_attr_v2,
+        op_ld_attr_v3,
+        op_ld_attr_v4,
+
+        op_ld_var_addr,
+        op_st_vary_v1,
+        op_st_vary_v2,
+        op_st_vary_v3,
+        op_st_vary_v4,
+
+        op_store_v1,
+        op_store_v2,
+        op_store_v3,
+        op_store_v4,
+
+        op_create_vector,
+        op_extract_element,
+        op_last,
+};
+
+
+enum branch_cond {
+        BR_COND_LT = 0,
+        BR_COND_LE = 1,
+        BR_COND_GE = 2,
+        BR_COND_GT = 3,
+        // Equal vs. not-equal determined by src0/src1 comparison
+        BR_COND_EQ = 4,
+        // floating-point comparisons
+        // Becomes UNE when you flip the arguments
+        BR_COND_OEQ = 5,
+        // TODO what happens when you flip the arguments?
+        BR_COND_OGT = 6,
+        BR_COND_OLT = 7,
+};
+
+enum branch_code {
+        BR_ALWAYS = 63,
+};
+
+enum csel_cond {
+        CSEL_NEQ_0 = 0,
+        CSEL_FEQ,
+        CSEL_FGTR,
+        CSEL_FGE,
+        CSEL_IEQ,
+        CSEL_IGT,
+        CSEL_IGE,
+        CSEL_UGT,
+        CSEL_UGE,
+};
+
+#endif
index 03ade19a689d354cb3e32b1b199a5e9c47d9e8bf..02a60448bd8e7576d307aad188297fe7b27be8f1 100644 (file)
@@ -31,6 +31,7 @@
 #include <string.h>
 
 #include "bifrost.h"
+#include "bifrost_ops.h"
 #include "disassemble.h"
 #include "util/macros.h"
 
@@ -166,21 +167,6 @@ struct bifrost_dual_tex_ctrl {
         unsigned unk1 : 22;
 };
 
-enum branch_cond {
-        BR_COND_LT = 0,
-        BR_COND_LE = 1,
-        BR_COND_GE = 2,
-        BR_COND_GT = 3,
-        // Equal vs. not-equal determined by src0/src1 comparison
-        BR_COND_EQ = 4,
-        // floating-point comparisons
-        // Becomes UNE when you flip the arguments
-        BR_COND_OEQ = 5,
-        // TODO what happens when you flip the arguments?
-        BR_COND_OGT = 6,
-        BR_COND_OLT = 7,
-};
-
 enum branch_bit_size {
         BR_SIZE_32 = 0,
         BR_SIZE_16XX = 1,
@@ -201,10 +187,6 @@ enum branch_bit_size {
         BR_SIZE_ZERO = 7,
 };
 
-enum branch_code {
-        BR_ALWAYS = 63,
-};
-
 void dump_header(struct bifrost_header header, bool verbose);
 void dump_instr(const struct bifrost_alu_inst *instr, struct bifrost_regs next_regs, uint64_t *consts,
                 unsigned data_reg, unsigned offset, bool verbose);
@@ -287,6 +269,7 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
                 case 1:
                         decoded.fma_write_unit = REG_WRITE_TWO;
                         break;
+                case 2:
                 case 3:
                         decoded.fma_write_unit = REG_WRITE_TWO;
                         decoded.read_reg3 = true;
@@ -318,6 +301,8 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
                         decoded.add_write_unit = REG_WRITE_TWO;
                         decoded.clause_start = true;
                         break;
+
+                case 7:
                 case 15:
                         decoded.fma_write_unit = REG_WRITE_THREE;
                         decoded.add_write_unit = REG_WRITE_TWO;
@@ -677,14 +662,18 @@ static const struct fma_op_info FMAOpInfos[] = {
         // integer.
         { 0xe03ad, "FRSQ_FREXPE", FMA_ONE_SRC },
         { 0xe03c5, "LOG_FREXPE", FMA_ONE_SRC },
+        { 0xe03fa, "CLZ", FMA_ONE_SRC },
         { 0xe0b80, "IMAX3", FMA_THREE_SRC },
         { 0xe0bc0, "UMAX3", FMA_THREE_SRC },
         { 0xe0c00, "IMIN3", FMA_THREE_SRC },
         { 0xe0c40, "UMIN3", FMA_THREE_SRC },
+        { 0xe0ec5, "ROUND", FMA_ONE_SRC },
         { 0xe0f40, "CSEL", FMA_THREE_SRC }, // src2 != 0 ? src1 : src0
         { 0xe0fc0, "MUX.i32", FMA_THREE_SRC }, // see ADD comment
+        { 0xe1805, "ROUNDEVEN", FMA_ONE_SRC },
         { 0xe1845, "CEIL", FMA_ONE_SRC },
         { 0xe1885, "FLOOR", FMA_ONE_SRC },
+        { 0xe18c5, "TRUNC", FMA_ONE_SRC },
         { 0xe19b0, "ATAN_LDEXP.Y.f32", FMA_TWO_SRC },
         { 0xe19b8, "ATAN_LDEXP.X.f32", FMA_TWO_SRC },
         // These instructions in the FMA slot, together with LSHIFT_ADD_HIGH32.i32
@@ -1177,6 +1166,7 @@ static const struct add_op_info add_op_infos[] = {
         { 0x07bc5, "FLOG_FREXPE", ADD_ONE_SRC },
         { 0x07d45, "CEIL", ADD_ONE_SRC },
         { 0x07d85, "FLOOR", ADD_ONE_SRC },
+        { 0x07dc5, "TRUNC", ADD_ONE_SRC },
         { 0x07f18, "LSHIFT_ADD_HIGH32.i32", ADD_TWO_SRC },
         { 0x08000, "LD_ATTR.f16", ADD_LOAD_ATTR, true },
         { 0x08100, "LD_ATTR.v2f16", ADD_LOAD_ATTR, true },
index 7c22d43ac771c6d232a16032a0afa282bf2ca755..f5bce2e301ff88d6cad8ab96d00a6a9534075fcf 100644 (file)
@@ -25,4 +25,5 @@
 
 #include <stdbool.h>
 #include <stddef.h>
+#include <stdint.h>
 void disassemble_bifrost(uint8_t *code, size_t size, bool verbose);