ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')

cpu/
	* bpf.cpu (f-imm64): Avoid signed overflow.
opcodes/
	* bpf-ibld.c: Regenerate.

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 688c5960a33f05aa67ea83f43a9f004b072a3e1f..8755ee70a4d1e69515cb896307dd667db0247138 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-17  Alan Modra  <amodra@gmail.com>
+
+       * bpf.cpu (f-imm64): Avoid signed overflow.
+
 2019-12-16  Alan Modra  <amodra@gmail.com>
 
        * xstormy16.cpu (f-rel12a): Avoid signed overflow.

diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu
index db2301c4952bcf429d3e7f61fc3d0eba30da93e9..d5a8eacc05fdcbb97db60b252bcc748c75c2fad1 100644 (file)
--- a/cpu/bpf.cpu
+++ b/cpu/bpf.cpu
@@ -288,8 +288,8 @@
                     (set (ifield f-imm64-a) (and (ifield f-imm64) (const #xffffffff)))))
   (extract (sequence ()
                      (set (ifield f-imm64)
-                          (or (sll DI (zext DI (ifield f-imm64-c)) (const 32))
-                              (zext DI (ifield f-imm64-a)))))))
+                          (or (sll UDI (zext UDI (ifield f-imm64-c)) (const 32))
+                              (zext UDI (ifield f-imm64-a)))))))
 
 ;;; Operands
 

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 898a916bbb4ae783dec263dd6fab57bc4270281c..26f25a4ef3082e15de0a3d22769c7b8d066f77f0 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-17  Alan Modra  <amodra@gmail.com>
+
+       * bpf-ibld.c: Regenerate.
+
 2019-12-16  Alan Modra  <amodra@gmail.com>
 
        * aarch64-dis.c (sign_extend): Return uint64_t.  Rewrite without

diff --git a/opcodes/bpf-ibld.c b/opcodes/bpf-ibld.c
index b14c28b43bc2af1d96026b84d87aa17d93f1c05e..e2601dd38fd9cb23a5bb47b7829e4fb74773f3c0 100644 (file)
--- a/opcodes/bpf-ibld.c
+++ b/opcodes/bpf-ibld.c
@@ -689,7 +689,7 @@ bpf_cgen_extract_operand (CGEN_CPU_DESC cd,
         length = extract_normal (cd, ex_info, insn_value, 0, 96, 31, 32, 32, total_length, pc, & fields->f_imm64_c);
         if (length <= 0) break;
 {
-  FLD (f_imm64) = ((((((DI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((DI) (UINT) (FLD (f_imm64_a)))));
+  FLD (f_imm64) = ((((((UDI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((UDI) (UINT) (FLD (f_imm64_a)))));
 }
       }
       break;