+2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
+ * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
+ (arc_init): Likewise.
+ (arc_override_options): Likewise.
+ (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
+ value.
+ (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
+ support.
+ * config/arc/arc.h (TARGET_DBNZ): Define.
+ * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
+ properly set the tune attribute.
+ (dbnz): Use TARGET_DBNZ guard.
+ * config/arc/arc.opt (mtune): Add core3 option.
+
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_delegitimize_address_0): Refactored to
ARC_TUNE_NONE,
ARC_TUNE_ARC600,
ARC_TUNE_ARC700_4_2_STD,
- ARC_TUNE_ARC700_4_2_XMAC
+ ARC_TUNE_ARC700_4_2_XMAC,
+ ARC_TUNE_CORE_3
};
/* CPU specific properties. */
if (arc_multcost < 0)
switch (arc_tune)
{
- case TUNE_ARC700_4_2_STD:
+ case ARC_TUNE_ARC700_4_2_STD:
/* latency 7;
max throughput (1 multiply + 4 other insns) / 5 cycles. */
arc_multcost = COSTS_N_INSNS (4);
if (TARGET_NOMPY_SET)
arc_multcost = COSTS_N_INSNS (30);
break;
- case TUNE_ARC700_4_2_XMAC:
+ case ARC_TUNE_ARC700_4_2_XMAC:
/* latency 5;
max throughput (1 multiply + 2 other insns) / 3 cycles. */
arc_multcost = COSTS_N_INSNS (3);
if (TARGET_NOMPY_SET)
arc_multcost = COSTS_N_INSNS (30);
break;
- case TUNE_ARC600:
+ case ARC_TUNE_ARC600:
if (TARGET_MUL64_SET)
{
arc_multcost = COSTS_N_INSNS (4);
#undef ARC_OPT
/* Set Tune option. */
- if (arc_tune == TUNE_NONE)
- arc_tune = (enum attr_tune) arc_selected_cpu->tune;
+ if (arc_tune == ARC_TUNE_NONE)
+ arc_tune = (enum arc_tune_attr) arc_selected_cpu->tune;
if (arc_size_opt_level == 3)
optimize_size = 1;
TARGET_NO_SDATA_SET ? 0 : 2);
asm_fprintf (asm_out_file, "\t.arc_attribute Tag_ARC_ABI_exceptions, %d\n",
TARGET_OPTFPE ? 1 : 0);
+ if (TARGET_V2)
+ asm_fprintf (asm_out_file, "\t.arc_attribute Tag_ARC_CPU_variation, %d\n",
+ arc_tune == ARC_TUNE_CORE_3 ? 3 : 2);
}
/* Implement `TARGET_ASM_FILE_END'. */
rtx test;
rtx insn = loop->loop_end;
- if (TARGET_V2
+ if (TARGET_DBNZ
&& (loop->length && (loop->length <= ARC_MAX_LOOP_LENGTH))
&& REG_P (loop->iter_reg))
{
- /* TARGET_V2 has dbnz instructions. */
+ /* TARGET_V2 core3 has dbnz instructions. */
test = gen_dbnz (loop->iter_reg, loop->start_label);
insn = emit_jump_insn_before (test, loop->loop_end);
}
/* Custom FP instructions used by QuarkSE EM cpu. */
#define TARGET_FPX_QUARK (TARGET_EM && TARGET_SPFP \
&& (arc_fpu_build == FPX_QK))
+/* DBNZ support is available for ARCv2 core3 cpus. */
+#define TARGET_DBNZ (TARGET_V2 && (arc_tune == ARC_TUNE_CORE_3))
#endif /* GCC_ARC_H */
;; somehow modify them to become inelegible for delay slots if a decision
;; is made that makes conditional execution required.
-(define_attr "tune" "none,arc600,arc700_4_2_std,arc700_4_2_xmac"
+(define_attr "tune" "none,arc600,arc700_4_2_std,arc700_4_2_xmac, core_3"
(const
(cond [(symbol_ref "arc_tune == TUNE_ARC600")
(const_string "arc600")
(symbol_ref "arc_tune == TUNE_ARC700_4_2_STD")
(const_string "arc700_4_2_std")
(symbol_ref "arc_tune == TUNE_ARC700_4_2_XMAC")
- (const_string "arc700_4_2_xmac")]
+ (const_string "arc700_4_2_xmac")
+ (symbol_ref "arc_tune == ARC_TUNE_CORE_3")
+ (const_string "core_3")]
(const_string "none"))))
(define_attr "tune_arc700" "false,true"
(plus:SI (match_dup 0)
(const_int -1)))
(clobber (match_scratch:SI 2 "=X,r"))]
- "TARGET_V2"
+ "TARGET_DBNZ"
"@
dbnz%#\\t%0,%l1
#"
- "TARGET_V2 && reload_completed && memory_operand (operands[0], SImode)"
+ "TARGET_DBNZ && reload_completed && memory_operand (operands[0], SImode)"
[(set (match_dup 2) (match_dup 0))
(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))
(set (reg:CC CC_REG) (compare:CC (match_dup 2) (const_int 0)))
Target RejectNegative Joined UInteger Var(arc_multcost) Init(-1)
Cost to assume for a multiply instruction, with 4 being equal to a normal insn.
-mtune=ARC600
-Target RejectNegative Var(arc_tune, TUNE_ARC600)
-Tune for ARC600 cpu.
+mtune=
+Target RejectNegative ToLower Joined Var(arc_tune) Enum(arc_tune_attr) Init(ARC_TUNE_NONE)
+-mcpu=TUNE Tune code for given ARC variant.
-mtune=ARC601
-Target RejectNegative Var(arc_tune, TUNE_ARC600)
-Tune for ARC601 cpu.
+Enum
+Name(arc_tune_attr) Type(int)
+
+EnumValue
+Enum(arc_tune_attr) String(arc600) Value(ARC_TUNE_ARC600)
-mtune=ARC700
-Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_STD)
-Tune for ARC700 R4.2 Cpu with standard multiplier block.
+EnumValue
+Enum(arc_tune_attr) String(arc601) Value(ARC_TUNE_ARC600)
-mtune=ARC700-xmac
-Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC)
-Tune for ARC700 R4.2 Cpu with XMAC block.
+EnumValue
+Enum(arc_tune_attr) String(arc700) Value(ARC_TUNE_ARC700_4_2_STD)
-mtune=ARC725D
-Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC)
-Tune for ARC700 R4.2 Cpu with XMAC block.
+EnumValue
+Enum(arc_tune_attr) String(arc700-xmac) Value(ARC_TUNE_ARC700_4_2_XMAC)
-mtune=ARC750D
-Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC)
-Tune for ARC700 R4.2 Cpu with XMAC block.
+EnumValue
+Enum(arc_tune_attr) String(arc725d) Value(ARC_TUNE_ARC700_4_2_XMAC)
+
+EnumValue
+Enum(arc_tune_attr) String(arc750d) Value(ARC_TUNE_ARC700_4_2_XMAC)
+
+EnumValue
+Enum(arc_tune_attr) String(core3) Value(ARC_TUNE_CORE_3)
mindexed-loads
Target Var(TARGET_INDEXED_LOADS) Init(TARGET_INDEXED_LOADS_DEFAULT)
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