arm.c (arm_print_operand): Use MEM_SIZE to get the size of a '%A' memory reference.

author Richard Sandiford <richard.sandiford@linaro.org>

Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)

committer Richard Sandiford <rsandifo@gcc.gnu.org>

Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)
author Richard Sandiford <richard.sandiford@linaro.org>
Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)
committer Richard Sandiford <rsandifo@gcc.gnu.org>
Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog

index d7a72dbf44ce554620fe2609eb8392d4de38c674..61d6a941361e721af3f4f447a968bb2d3639614d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,35 @@
+2011-04-12  Richard Sandiford  <richard.sandiford@linaro.org>
+
+       * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the
+       size of a '%A' memory reference.
+       (T_DREG, T_QREG): New neon_builtin_type_bits.
+       (arm_init_neon_builtins): Assert that the load and store operands
+       are neon_struct_operands.
+       (locate_neon_builtin_icode): Provide the neon_builtin_type_bits.
+       (NEON_ARG_MEMORY): New builtin_arg.
+       (neon_dereference_pointer): New function.
+       (arm_expand_neon_args): Add a neon_builtin_type_bits argument.
+       Handle NEON_ARG_MEMORY.
+       (arm_expand_neon_builtin): Update after above interface changes.
+       Use NEON_ARG_MEMORY for loads and stores.
+       * config/arm/predicates.md (neon_struct_operand): New predicate.
+       * config/arm/iterators.md (V_two_elem): Tweak formatting.
+       (V_three_elem): Use BLKmode for accesses that have no associated mode.
+       (V_four_elem): Tweak formatting.
+       * config/arm/neon.md (neon_vld1<mode>, neon_vld1_dup<mode>)
+       (neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>)
+       (neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>)
+       (neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>)
+       (neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>)
+       (neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>)
+       (neon_vst4<mode>): Replace pointer operand with a memory operand.
+       Use %A in the output template.
+       (neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>)
+       (neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>)
+       (neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve
+       the width of the memory access.  Remove post-increment.
+       * config/arm/neon-testgen.ml: Allow addresses to have an alignment.
+
  2011-04-12  Nick Clifton  <nickc@redhat.com>
  
         * config/v850/v850.c (expand_prologue): Do not use the CALLT
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c

index 3dc2fdda2002c7263ecd42a11b806043c944d234..d9b9829c3c682fcbbadd180d8431d0a256bb4e39 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -16566,7 +16566,7 @@ arm_print_operand (FILE *stream, rtx x, int code)
        {
         rtx addr;
         bool postinc = FALSE;
-       unsigned align, modesize, align_bits;
+       unsigned align, memsize, align_bits;
  
         gcc_assert (GET_CODE (x) == MEM);
         addr = XEXP (x, 0);
@@ -16581,12 +16581,12 @@ arm_print_operand (FILE *stream, rtx x, int code)
            instruction (for some alignments) as an aid to the memory subsystem
            of the target.  */
         align = MEM_ALIGN (x) >> 3;
-       modesize = GET_MODE_SIZE (GET_MODE (x));
+       memsize = INTVAL (MEM_SIZE (x));
         
         /* Only certain alignment specifiers are supported by the hardware.  */
-       if (modesize == 16 && (align % 32) == 0)
+       if (memsize == 16 && (align % 32) == 0)
           align_bits = 256;
-       else if ((modesize == 8 || modesize == 16) && (align % 16) == 0)
+       else if ((memsize == 8 || memsize == 16) && (align % 16) == 0)
           align_bits = 128;
         else if ((align % 8) == 0)
           align_bits = 64;
@@ -18246,12 +18246,14 @@ enum neon_builtin_type_bits {
    T_V2SI  = 0x0004,
    T_V2SF  = 0x0008,
    T_DI    = 0x0010,
+  T_DREG  = 0x001F,
    T_V16QI = 0x0020,
    T_V8HI  = 0x0040,
    T_V4SI  = 0x0080,
    T_V4SF  = 0x0100,
    T_V2DI  = 0x0200,
    T_TI   = 0x0400,
+  T_QREG  = 0x07E0,
    T_EI   = 0x0800,
    T_OI   = 0x1000
  };
@@ -18897,10 +18899,9 @@ arm_init_neon_builtins (void)
                     if (is_load && k == 1)
                       {
                         /* Neon load patterns always have the memory operand
-                          (a SImode pointer) in the operand 1 position.  We
-                          want a const pointer to the element type in that
-                          position.  */
-                       gcc_assert (insn_data[icode].operand[k].mode == SImode);
+                          in the operand 1 position.  */
+                       gcc_assert (insn_data[icode].operand[k].predicate
+                                   == neon_struct_operand);
  
                         switch (1 << j)
                           {
@@ -18935,10 +18936,9 @@ arm_init_neon_builtins (void)
                     else if (is_store && k == 0)
                       {
                         /* Similarly, Neon store patterns use operand 0 as
-                          the memory location to store to (a SImode pointer).
-                          Use a pointer to the element type of the store in
-                          that position.  */
-                       gcc_assert (insn_data[icode].operand[k].mode == SImode);
+                          the memory location to store to.  */
+                       gcc_assert (insn_data[icode].operand[k].predicate
+                                   == neon_struct_operand);
  
                         switch (1 << j)
                           {
@@ -19258,12 +19258,13 @@ neon_builtin_compare (const void *a, const void *b)
  }
  
  static enum insn_code
-locate_neon_builtin_icode (int fcode, neon_itype *itype)
+locate_neon_builtin_icode (int fcode, neon_itype *itype,
+                          enum neon_builtin_type_bits *type_bit)
  {
    neon_builtin_datum key
      = { NULL, (neon_itype) 0, 0, { CODE_FOR_nothing }, 0, 0 };
    neon_builtin_datum *found;
-  int idx;
+  int idx, type, ntypes;
  
    key.base_fcode = fcode;
    found = (neon_builtin_datum *)
@@ -19276,20 +19277,84 @@ locate_neon_builtin_icode (int fcode, neon_itype *itype)
    if (itype)
      *itype = found->itype;
  
+  if (type_bit)
+    {
+      ntypes = 0;
+      for (type = 0; type < T_MAX; type++)
+       if (found->bits & (1 << type))
+         {
+           if (ntypes == idx)
+             break;
+           ntypes++;
+         }
+      gcc_assert (type < T_MAX);
+      *type_bit = (enum neon_builtin_type_bits) (1 << type);
+    }
    return found->codes[idx];
  }
  
  typedef enum {
    NEON_ARG_COPY_TO_REG,
    NEON_ARG_CONSTANT,
+  NEON_ARG_MEMORY,
    NEON_ARG_STOP
  } builtin_arg;
  
  #define NEON_MAX_BUILTIN_ARGS 5
  
+/* EXP is a pointer argument to a Neon load or store intrinsic.  Derive
+   and return an expression for the accessed memory.
+
+   The intrinsic function operates on a block of registers that has
+   mode REG_MODE.  This block contains vectors of type TYPE_BIT.
+   The function references the memory at EXP in mode MEM_MODE;
+   this mode may be BLKmode if no more suitable mode is available.  */
+
+static tree
+neon_dereference_pointer (tree exp, enum machine_mode mem_mode,
+                         enum machine_mode reg_mode,
+                         enum neon_builtin_type_bits type_bit)
+{
+  HOST_WIDE_INT reg_size, vector_size, nvectors, nelems;
+  tree elem_type, upper_bound, array_type;
+
+  /* Work out the size of the register block in bytes.  */
+  reg_size = GET_MODE_SIZE (reg_mode);
+
+  /* Work out the size of each vector in bytes.  */
+  gcc_assert (type_bit & (T_DREG | T_QREG));
+  vector_size = (type_bit & T_QREG ? 16 : 8);
+
+  /* Work out how many vectors there are.  */
+  gcc_assert (reg_size % vector_size == 0);
+  nvectors = reg_size / vector_size;
+
+  /* Work out how many elements are being loaded or stored.
+     MEM_MODE == REG_MODE implies a one-to-one mapping between register
+     and memory elements; anything else implies a lane load or store.  */
+  if (mem_mode == reg_mode)
+    nelems = vector_size * nvectors;
+  else
+    nelems = nvectors;
+
+  /* Work out the type of each element.  */
+  gcc_assert (POINTER_TYPE_P (TREE_TYPE (exp)));
+  elem_type = TREE_TYPE (TREE_TYPE (exp));
+
+  /* Create a type that describes the full access.  */
+  upper_bound = build_int_cst (size_type_node, nelems - 1);
+  array_type = build_array_type (elem_type, build_index_type (upper_bound));
+
+  /* Dereference EXP using that type.  */
+  exp = convert (build_pointer_type (array_type), exp);
+  return fold_build2 (MEM_REF, array_type, exp,
+                     build_int_cst (TREE_TYPE (exp), 0));
+}
+
  /* Expand a Neon builtin.  */
  static rtx
  arm_expand_neon_args (rtx target, int icode, int have_retval,
+                     enum neon_builtin_type_bits type_bit,
                       tree exp, ...)
  {
    va_list ap;
@@ -19298,7 +19363,9 @@ arm_expand_neon_args (rtx target, int icode, int have_retval,
    rtx op[NEON_MAX_BUILTIN_ARGS];
    enum machine_mode tmode = insn_data[icode].operand[0].mode;
    enum machine_mode mode[NEON_MAX_BUILTIN_ARGS];
+  enum machine_mode other_mode;
    int argc = 0;
+  int opno;
  
    if (have_retval
        && (!target
@@ -19316,26 +19383,46 @@ arm_expand_neon_args (rtx target, int icode, int have_retval,
          break;
        else
          {
+          opno = argc + have_retval;
+          mode[argc] = insn_data[icode].operand[opno].mode;
            arg[argc] = CALL_EXPR_ARG (exp, argc);
+          if (thisarg == NEON_ARG_MEMORY)
+            {
+              other_mode = insn_data[icode].operand[1 - opno].mode;
+              arg[argc] = neon_dereference_pointer (arg[argc], mode[argc],
+                                                    other_mode, type_bit);
+            }
            op[argc] = expand_normal (arg[argc]);
-          mode[argc] = insn_data[icode].operand[argc + have_retval].mode;
  
            switch (thisarg)
              {
              case NEON_ARG_COPY_TO_REG:
                /*gcc_assert (GET_MODE (op[argc]) == mode[argc]);*/
-              if (!(*insn_data[icode].operand[argc + have_retval].predicate)
+              if (!(*insn_data[icode].operand[opno].predicate)
                       (op[argc], mode[argc]))
                  op[argc] = copy_to_mode_reg (mode[argc], op[argc]);
                break;
  
              case NEON_ARG_CONSTANT:
                /* FIXME: This error message is somewhat unhelpful.  */
-              if (!(*insn_data[icode].operand[argc + have_retval].predicate)
+              if (!(*insn_data[icode].operand[opno].predicate)
                      (op[argc], mode[argc]))
                 error ("argument must be a constant");
                break;
  
+            case NEON_ARG_MEMORY:
+             gcc_assert (MEM_P (op[argc]));
+             PUT_MODE (op[argc], mode[argc]);
+             /* ??? arm_neon.h uses the same built-in functions for signed
+                and unsigned accesses, casting where necessary.  This isn't
+                alias safe.  */
+             set_mem_alias_set (op[argc], 0);
+             if (!(*insn_data[icode].operand[opno].predicate)
+                    (op[argc], mode[argc]))
+               op[argc] = (replace_equiv_address
+                           (op[argc], force_reg (Pmode, XEXP (op[argc], 0))));
+              break;
+
              case NEON_ARG_STOP:
                gcc_unreachable ();
              }
@@ -19414,14 +19501,15 @@ static rtx
  arm_expand_neon_builtin (int fcode, tree exp, rtx target)
  {
    neon_itype itype;
-  enum insn_code icode = locate_neon_builtin_icode (fcode, &itype);
+  enum neon_builtin_type_bits type_bit;
+  enum insn_code icode = locate_neon_builtin_icode (fcode, &itype, &type_bit);
  
    switch (itype)
      {
      case NEON_UNOP:
      case NEON_CONVERT:
      case NEON_DUPLANE:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_BINOP:
@@ -19431,90 +19519,90 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
      case NEON_SCALARMULH:
      case NEON_SHIFTINSERT:
      case NEON_LOGICBINOP:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
          NEON_ARG_STOP);
  
      case NEON_TERNOP:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
          NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_GETLANE:
      case NEON_FIXCONV:
      case NEON_SHIFTIMM:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT,
          NEON_ARG_STOP);
  
      case NEON_CREATE:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
  
      case NEON_DUP:
      case NEON_SPLIT:
      case NEON_REINTERP:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
  
      case NEON_COMBINE:
      case NEON_VTBL:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
  
      case NEON_RESULTPAIR:
-      return arm_expand_neon_args (target, icode, 0, exp,
+      return arm_expand_neon_args (target, icode, 0, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
          NEON_ARG_STOP);
  
      case NEON_LANEMUL:
      case NEON_LANEMULL:
      case NEON_LANEMULH:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
          NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_LANEMAC:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
          NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_SHIFTACC:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
          NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
          NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_SCALARMAC:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
         NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
          NEON_ARG_CONSTANT, NEON_ARG_STOP);
  
      case NEON_SELECT:
      case NEON_VTBX:
-      return arm_expand_neon_args (target, icode, 1, exp,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
         NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
          NEON_ARG_STOP);
  
      case NEON_LOAD1:
      case NEON_LOADSTRUCT:
-      return arm_expand_neon_args (target, icode, 1, exp,
-       NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
+       NEON_ARG_MEMORY, NEON_ARG_STOP);
  
      case NEON_LOAD1LANE:
      case NEON_LOADSTRUCTLANE:
-      return arm_expand_neon_args (target, icode, 1, exp,
-       NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
+      return arm_expand_neon_args (target, icode, 1, type_bit, exp,
+       NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
         NEON_ARG_STOP);
  
      case NEON_STORE1:
      case NEON_STORESTRUCT:
-      return arm_expand_neon_args (target, icode, 0, exp,
-       NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
+      return arm_expand_neon_args (target, icode, 0, type_bit, exp,
+       NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
  
      case NEON_STORE1LANE:
      case NEON_STORESTRUCTLANE:
-      return arm_expand_neon_args (target, icode, 0, exp,
-       NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
+      return arm_expand_neon_args (target, icode, 0, type_bit, exp,
+       NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
         NEON_ARG_STOP);
      }
  
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md

index 887c962baeb9efad94d6409c4dbbd9926931b5a8..b11b112d7a13b6649750c4d380b5c578c4fa6f3b 100644 (file)
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -194,24 +194,22 @@
  
  ;; Mode of pair of elements for each vector mode, to define transfer
  ;; size for structure lane/dup loads and stores.
-(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI")
-                  (V4HI "SI") (V8HI "SI")
+(define_mode_attr V_two_elem [(V8QI "HI")   (V16QI "HI")
+                              (V4HI "SI")   (V8HI "SI")
                                (V2SI "V2SI") (V4SI "V2SI")
                                (V2SF "V2SF") (V4SF "V2SF")
                                (DI "V2DI")   (V2DI "V2DI")])
  
  ;; Similar, for three elements.
-;; ??? Should we define extra modes so that sizes of all three-element
-;; accesses can be accurately represented?
-(define_mode_attr V_three_elem [(V8QI "SI")   (V16QI "SI")
-                    (V4HI "V4HI") (V8HI "V4HI")
-                                (V2SI "V4SI") (V4SI "V4SI")
-                                (V2SF "V4SF") (V4SF "V4SF")
-                                (DI "EI")     (V2DI "EI")])
+(define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK")
+                                (V4HI "BLK") (V8HI "BLK")
+                                (V2SI "BLK") (V4SI "BLK")
+                                (V2SF "BLK") (V4SF "BLK")
+                                (DI "EI")    (V2DI "EI")])
  
  ;; Similar, for four elements.
  (define_mode_attr V_four_elem [(V8QI "SI")   (V16QI "SI")
-                   (V4HI "V4HI") (V8HI "V4HI")
+                               (V4HI "V4HI") (V8HI "V4HI")
                                 (V2SI "V4SI") (V4SI "V4SI")
                                 (V2SF "V4SF") (V4SF "V4SF")
                                 (DI "OI")     (V2DI "OI")])
diff --git a/gcc/config/arm/neon-testgen.ml b/gcc/config/arm/neon-testgen.ml

index 63fbbbf2c35e8e89ea341393f935253476804815..eb2917da9b1c73a7c4873e53515da295fbde8313 100644 (file)
--- a/gcc/config/arm/neon-testgen.ml
+++ b/gcc/config/arm/neon-testgen.ml
@@ -177,7 +177,7 @@ let rec analyze_shape shape =
        let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in
          "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}"
      | (PtrTo elt | CstPtrTo elt) ->
-      "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]"
+      "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]"
      | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
      | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
      | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]"
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md

index 723e589c0cc452cc03b721028271c58e890aaf24..8231782983ac5d94983b08d8e485f9e40afc3a0a 100644 (file)
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -4260,16 +4260,16 @@
  
  (define_insn "neon_vld1<mode>"
    [(set (match_operand:VDQX 0 "s_register_operand" "=w")
-        (unspec:VDQX [(mem:VDQX (match_operand:SI 1 "s_register_operand" "r"))]
+        (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand" "Um")]
                      UNSPEC_VLD1))]
    "TARGET_NEON"
-  "vld1.<V_sz_elem>\t%h0, [%1]"
+  "vld1.<V_sz_elem>\t%h0, %A1"
    [(set_attr "neon_type" "neon_vld1_1_2_regs")]
  )
  
  (define_insn "neon_vld1_lane<mode>"
    [(set (match_operand:VDX 0 "s_register_operand" "=w")
-        (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
                       (match_operand:VDX 2 "s_register_operand" "0")
                       (match_operand:SI 3 "immediate_operand" "i")]
                      UNSPEC_VLD1_LANE))]
@@ -4280,9 +4280,9 @@
    if (lane < 0 || lane >= max)
      error ("lane out of range");
    if (max == 1)
-    return "vld1.<V_sz_elem>\t%P0, [%1]";
+    return "vld1.<V_sz_elem>\t%P0, %A1";
    else
-    return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]";
+    return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2))
@@ -4292,7 +4292,7 @@
  
  (define_insn "neon_vld1_lane<mode>"
    [(set (match_operand:VQX 0 "s_register_operand" "=w")
-        (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
                       (match_operand:VQX 2 "s_register_operand" "0")
                       (match_operand:SI 3 "immediate_operand" "i")]
                      UNSPEC_VLD1_LANE))]
@@ -4311,9 +4311,9 @@
      }
    operands[0] = gen_rtx_REG (<V_HALF>mode, regno);
    if (max == 2)
-    return "vld1.<V_sz_elem>\t%P0, [%1]";
+    return "vld1.<V_sz_elem>\t%P0, %A1";
    else
-    return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]";
+    return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2))
@@ -4323,14 +4323,14 @@
  
  (define_insn "neon_vld1_dup<mode>"
    [(set (match_operand:VDX 0 "s_register_operand" "=w")
-        (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))]
+        (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")]
                      UNSPEC_VLD1_DUP))]
    "TARGET_NEON"
  {
    if (GET_MODE_NUNITS (<MODE>mode) > 1)
-    return "vld1.<V_sz_elem>\t{%P0[]}, [%1]";
+    return "vld1.<V_sz_elem>\t{%P0[]}, %A1";
    else
-    return "vld1.<V_sz_elem>\t%h0, [%1]";
+    return "vld1.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
@@ -4340,14 +4340,14 @@
  
  (define_insn "neon_vld1_dup<mode>"
    [(set (match_operand:VQX 0 "s_register_operand" "=w")
-        (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))]
+        (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")]
                      UNSPEC_VLD1_DUP))]
    "TARGET_NEON"
  {
    if (GET_MODE_NUNITS (<MODE>mode) > 2)
-    return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, [%1]";
+    return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, %A1";
    else
-    return "vld1.<V_sz_elem>\t%h0, [%1]";
+    return "vld1.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
@@ -4356,15 +4356,15 @@
  )
  
  (define_insn "neon_vst1<mode>"
-  [(set (mem:VDQX (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um")
         (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")]
                      UNSPEC_VST1))]
    "TARGET_NEON"
-  "vst1.<V_sz_elem>\t%h1, [%0]"
+  "vst1.<V_sz_elem>\t%h1, %A0"
    [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
  
  (define_insn "neon_vst1_lane<mode>"
-  [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
         (vec_select:<V_elem>
           (match_operand:VDX 1 "s_register_operand" "w")
           (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))]
@@ -4375,9 +4375,9 @@
    if (lane < 0 || lane >= max)
      error ("lane out of range");
    if (max == 1)
-    return "vst1.<V_sz_elem>\t{%P1}, [%0]";
+    return "vst1.<V_sz_elem>\t{%P1}, %A0";
    else
-    return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]";
+    return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 1))
@@ -4385,7 +4385,7 @@
                      (const_string "neon_vst1_vst2_lane")))])
  
  (define_insn "neon_vst1_lane<mode>"
-  [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
          (vec_select:<V_elem>
             (match_operand:VQX 1 "s_register_operand" "w")
             (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))]
@@ -4404,24 +4404,24 @@
      }
    operands[1] = gen_rtx_REG (<V_HALF>mode, regno);
    if (max == 2)
-    return "vst1.<V_sz_elem>\t{%P1}, [%0]";
+    return "vst1.<V_sz_elem>\t{%P1}, %A0";
    else
-    return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]";
+    return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0";
  }
    [(set_attr "neon_type" "neon_vst1_vst2_lane")]
  )
  
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
-        (unspec:TI [(mem:TI (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vld1.64\t%h0, [%1]";
+    return "vld1.64\t%h0, %A1";
    else
-    return "vld2.<V_sz_elem>\t%h0, [%1]";
+    return "vld2.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -4431,16 +4431,16 @@
  
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
-        (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
-  "vld2.<V_sz_elem>\t%h0, [%1]"
+  "vld2.<V_sz_elem>\t%h0, %A1"
    [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")])
  
  (define_insn "neon_vld2_lane<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
-        (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:TI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -4457,7 +4457,7 @@
    ops[1] = gen_rtx_REG (DImode, regno + 2);
    ops[2] = operands[1];
    ops[3] = operands[3];
-  output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops);
+  output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld1_vld2_lane")]
@@ -4465,7 +4465,7 @@
  
  (define_insn "neon_vld2_lane<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
-        (unspec:OI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:OI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:OI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -4487,7 +4487,7 @@
    ops[1] = gen_rtx_REG (DImode, regno + 4);
    ops[2] = operands[1];
    ops[3] = GEN_INT (lane);
-  output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops);
+  output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld1_vld2_lane")]
@@ -4495,15 +4495,15 @@
  
  (define_insn "neon_vld2_dup<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
-        (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2_DUP))]
    "TARGET_NEON"
  {
    if (GET_MODE_NUNITS (<MODE>mode) > 1)
-    return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, [%1]";
+    return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, %A1";
    else
-    return "vld1.<V_sz_elem>\t%h0, [%1]";
+    return "vld1.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
@@ -4512,16 +4512,16 @@
  )
  
  (define_insn "neon_vst2<mode>"
-  [(set (mem:TI (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:TI 0 "neon_struct_operand" "=Um")
          (unspec:TI [(match_operand:TI 1 "s_register_operand" "w")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST2))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vst1.64\t%h1, [%0]";
+    return "vst1.64\t%h1, %A0";
    else
-    return "vst2.<V_sz_elem>\t%h1, [%0]";
+    return "vst2.<V_sz_elem>\t%h1, %A0";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -4530,17 +4530,17 @@
  )
  
  (define_insn "neon_vst2<mode>"
-  [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
         (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
                     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                    UNSPEC_VST2))]
    "TARGET_NEON"
-  "vst2.<V_sz_elem>\t%h1, [%0]"
+  "vst2.<V_sz_elem>\t%h1, %A0"
    [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]
  )
  
  (define_insn "neon_vst2_lane<mode>"
-  [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
         (unspec:<V_two_elem>
           [(match_operand:TI 1 "s_register_operand" "w")
            (match_operand:SI 2 "immediate_operand" "i")
@@ -4558,14 +4558,14 @@
    ops[1] = gen_rtx_REG (DImode, regno);
    ops[2] = gen_rtx_REG (DImode, regno + 2);
    ops[3] = operands[2];
-  output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops);
+  output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst1_vst2_lane")]
  )
  
  (define_insn "neon_vst2_lane<mode>"
-  [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
          (unspec:<V_two_elem>
             [(match_operand:OI 1 "s_register_operand" "w")
              (match_operand:SI 2 "immediate_operand" "i")
@@ -4588,7 +4588,7 @@
    ops[1] = gen_rtx_REG (DImode, regno);
    ops[2] = gen_rtx_REG (DImode, regno + 4);
    ops[3] = GEN_INT (lane);
-  output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops);
+  output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst1_vst2_lane")]
@@ -4596,15 +4596,15 @@
  
  (define_insn "neon_vld3<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
-        (unspec:EI [(mem:EI (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vld1.64\t%h0, [%1]";
+    return "vld1.64\t%h0, %A1";
    else
-    return "vld3.<V_sz_elem>\t%h0, [%1]";
+    return "vld3.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -4613,25 +4613,25 @@
  )
  
  (define_expand "neon_vld3<mode>"
-  [(match_operand:CI 0 "s_register_operand" "=w")
-   (match_operand:SI 1 "s_register_operand" "+r")
+  [(match_operand:CI 0 "s_register_operand")
+   (match_operand:CI 1 "neon_struct_operand")
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vld3qa<mode> (operands[0], operands[1], operands[1]));
-  emit_insn (gen_neon_vld3qb<mode> (operands[0], operands[0],
-                                    operands[1], operands[1]));
+  rtx mem;
+
+  mem = adjust_address (operands[1], EImode, 0);
+  emit_insn (gen_neon_vld3qa<mode> (operands[0], mem));
+  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
+  emit_insn (gen_neon_vld3qb<mode> (operands[0], mem, operands[0]));
    DONE;
  })
  
  (define_insn "neon_vld3qa<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
-        (unspec:CI [(mem:CI (match_operand:SI 2 "s_register_operand" "1"))
+        (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VLD3A))
-   (set (match_operand:SI 1 "s_register_operand" "=r")
-        (plus:SI (match_dup 2)
-                (const_int 24)))]
+                   UNSPEC_VLD3A))]
    "TARGET_NEON"
  {
    int regno = REGNO (operands[0]);
@@ -4640,7 +4640,7 @@
    ops[1] = gen_rtx_REG (DImode, regno + 4);
    ops[2] = gen_rtx_REG (DImode, regno + 8);
    ops[3] = operands[1];
-  output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops);
+  output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld3_vld4")]
@@ -4648,13 +4648,10 @@
  
  (define_insn "neon_vld3qb<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
-        (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2"))
-                    (match_operand:CI 1 "s_register_operand" "0")
+        (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
+                    (match_operand:CI 2 "s_register_operand" "0")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VLD3B))
-   (set (match_operand:SI 2 "s_register_operand" "=r")
-        (plus:SI (match_dup 3)
-                (const_int 24)))]
+                   UNSPEC_VLD3B))]
    "TARGET_NEON"
  {
    int regno = REGNO (operands[0]);
@@ -4662,8 +4659,8 @@
    ops[0] = gen_rtx_REG (DImode, regno + 2);
    ops[1] = gen_rtx_REG (DImode, regno + 6);
    ops[2] = gen_rtx_REG (DImode, regno + 10);
-  ops[3] = operands[2];
-  output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops);
+  ops[3] = operands[1];
+  output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld3_vld4")]
@@ -4671,7 +4668,7 @@
  
  (define_insn "neon_vld3_lane<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
-        (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:EI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -4689,7 +4686,7 @@
    ops[2] = gen_rtx_REG (DImode, regno + 4);
    ops[3] = operands[1];
    ops[4] = operands[3];
-  output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]",
+  output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3",
                     ops);
    return "";
  }
@@ -4698,7 +4695,7 @@
  
  (define_insn "neon_vld3_lane<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
-        (unspec:CI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:CI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:CI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -4721,7 +4718,7 @@
    ops[2] = gen_rtx_REG (DImode, regno + 8);
    ops[3] = operands[1];
    ops[4] = GEN_INT (lane);
-  output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]",
+  output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3",
                     ops);
    return "";
  }
@@ -4730,7 +4727,7 @@
  
  (define_insn "neon_vld3_dup<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
-        (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3_DUP))]
    "TARGET_NEON"
@@ -4743,11 +4740,11 @@
        ops[1] = gen_rtx_REG (DImode, regno + 2);
        ops[2] = gen_rtx_REG (DImode, regno + 4);
        ops[3] = operands[1];
-      output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, [%3]", ops);
+      output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, %A3", ops);
        return "";
      }
    else
-    return "vld1.<V_sz_elem>\t%h0, [%1]";
+    return "vld1.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
@@ -4755,16 +4752,16 @@
                      (const_string "neon_vld1_1_2_regs")))])
  
  (define_insn "neon_vst3<mode>"
-  [(set (mem:EI (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:EI 1 "s_register_operand" "w")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vst1.64\t%h1, [%0]";
+    return "vst1.64\t%h1, %A0";
    else
-    return "vst3.<V_sz_elem>\t%h1, [%0]";
+    return "vst3.<V_sz_elem>\t%h1, %A0";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -4772,62 +4769,60 @@
                      (const_string "neon_vst2_4_regs_vst3_vst4")))])
  
  (define_expand "neon_vst3<mode>"
-  [(match_operand:SI 0 "s_register_operand" "+r")
-   (match_operand:CI 1 "s_register_operand" "w")
+  [(match_operand:CI 0 "neon_struct_operand")
+   (match_operand:CI 1 "s_register_operand")
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vst3qa<mode> (operands[0], operands[0], operands[1]));
-  emit_insn (gen_neon_vst3qb<mode> (operands[0], operands[0], operands[1]));
+  rtx mem;
+
+  mem = adjust_address (operands[0], EImode, 0);
+  emit_insn (gen_neon_vst3qa<mode> (mem, operands[1]));
+  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
+  emit_insn (gen_neon_vst3qb<mode> (mem, operands[1]));
    DONE;
  })
  
  (define_insn "neon_vst3qa<mode>"
-  [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0"))
-        (unspec:EI [(match_operand:CI 2 "s_register_operand" "w")
+  [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
+        (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VST3A))
-   (set (match_operand:SI 0 "s_register_operand" "=r")
-        (plus:SI (match_dup 1)
-                (const_int 24)))]
+                   UNSPEC_VST3A))]
    "TARGET_NEON"
  {
-  int regno = REGNO (operands[2]);
+  int regno = REGNO (operands[1]);
    rtx ops[4];
    ops[0] = operands[0];
    ops[1] = gen_rtx_REG (DImode, regno);
    ops[2] = gen_rtx_REG (DImode, regno + 4);
    ops[3] = gen_rtx_REG (DImode, regno + 8);
-  output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops);
+  output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
  )
  
  (define_insn "neon_vst3qb<mode>"
-  [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0"))
-        (unspec:EI [(match_operand:CI 2 "s_register_operand" "w")
+  [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
+        (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VST3B))
-   (set (match_operand:SI 0 "s_register_operand" "=r")
-        (plus:SI (match_dup 1)
-                (const_int 24)))]
+                   UNSPEC_VST3B))]
    "TARGET_NEON"
  {
-  int regno = REGNO (operands[2]);
+  int regno = REGNO (operands[1]);
    rtx ops[4];
    ops[0] = operands[0];
    ops[1] = gen_rtx_REG (DImode, regno + 2);
    ops[2] = gen_rtx_REG (DImode, regno + 6);
    ops[3] = gen_rtx_REG (DImode, regno + 10);
-  output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops);
+  output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
  )
  
  (define_insn "neon_vst3_lane<mode>"
-  [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
          (unspec:<V_three_elem>
             [(match_operand:EI 1 "s_register_operand" "w")
              (match_operand:SI 2 "immediate_operand" "i")
@@ -4846,7 +4841,7 @@
    ops[2] = gen_rtx_REG (DImode, regno + 2);
    ops[3] = gen_rtx_REG (DImode, regno + 4);
    ops[4] = operands[2];
-  output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]",
+  output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0",
                     ops);
    return "";
  }
@@ -4854,7 +4849,7 @@
  )
  
  (define_insn "neon_vst3_lane<mode>"
-  [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
          (unspec:<V_three_elem>
             [(match_operand:CI 1 "s_register_operand" "w")
              (match_operand:SI 2 "immediate_operand" "i")
@@ -4878,7 +4873,7 @@
    ops[2] = gen_rtx_REG (DImode, regno + 4);
    ops[3] = gen_rtx_REG (DImode, regno + 8);
    ops[4] = GEN_INT (lane);
-  output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]",
+  output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0",
                     ops);
    return "";
  }
@@ -4886,15 +4881,15 @@
  
  (define_insn "neon_vld4<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
-        (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vld1.64\t%h0, [%1]";
+    return "vld1.64\t%h0, %A1";
    else
-    return "vld4.<V_sz_elem>\t%h0, [%1]";
+    return "vld4.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -4903,25 +4898,25 @@
  )
  
  (define_expand "neon_vld4<mode>"
-  [(match_operand:XI 0 "s_register_operand" "=w")
-   (match_operand:SI 1 "s_register_operand" "+r")
+  [(match_operand:XI 0 "s_register_operand")
+   (match_operand:XI 1 "neon_struct_operand")
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vld4qa<mode> (operands[0], operands[1], operands[1]));
-  emit_insn (gen_neon_vld4qb<mode> (operands[0], operands[0],
-                                    operands[1], operands[1]));
+  rtx mem;
+
+  mem = adjust_address (operands[1], OImode, 0);
+  emit_insn (gen_neon_vld4qa<mode> (operands[0], mem));
+  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
+  emit_insn (gen_neon_vld4qb<mode> (operands[0], mem, operands[0]));
    DONE;
  })
  
  (define_insn "neon_vld4qa<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
-        (unspec:XI [(mem:XI (match_operand:SI 2 "s_register_operand" "1"))
+        (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VLD4A))
-   (set (match_operand:SI 1 "s_register_operand" "=r")
-        (plus:SI (match_dup 2)
-                (const_int 32)))]
+                   UNSPEC_VLD4A))]
    "TARGET_NEON"
  {
    int regno = REGNO (operands[0]);
@@ -4931,7 +4926,7 @@
    ops[2] = gen_rtx_REG (DImode, regno + 8);
    ops[3] = gen_rtx_REG (DImode, regno + 12);
    ops[4] = operands[1];
-  output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops);
+  output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld3_vld4")]
@@ -4939,13 +4934,10 @@
  
  (define_insn "neon_vld4qb<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
-        (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2"))
-                    (match_operand:XI 1 "s_register_operand" "0")
+        (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
+                    (match_operand:XI 2 "s_register_operand" "0")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VLD4B))
-   (set (match_operand:SI 2 "s_register_operand" "=r")
-        (plus:SI (match_dup 3)
-                (const_int 32)))]
+                   UNSPEC_VLD4B))]
    "TARGET_NEON"
  {
    int regno = REGNO (operands[0]);
@@ -4954,8 +4946,8 @@
    ops[1] = gen_rtx_REG (DImode, regno + 6);
    ops[2] = gen_rtx_REG (DImode, regno + 10);
    ops[3] = gen_rtx_REG (DImode, regno + 14);
-  ops[4] = operands[2];
-  output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops);
+  ops[4] = operands[1];
+  output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vld3_vld4")]
@@ -4963,7 +4955,7 @@
  
  (define_insn "neon_vld4_lane<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
-        (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:OI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -4982,7 +4974,7 @@
    ops[3] = gen_rtx_REG (DImode, regno + 6);
    ops[4] = operands[1];
    ops[5] = operands[3];
-  output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]",
+  output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                     ops);
    return "";
  }
@@ -4991,7 +4983,7 @@
  
  (define_insn "neon_vld4_lane<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
-        (unspec:XI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:XI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
                      (match_operand:XI 2 "s_register_operand" "0")
                      (match_operand:SI 3 "immediate_operand" "i")
                      (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
@@ -5015,7 +5007,7 @@
    ops[3] = gen_rtx_REG (DImode, regno + 12);
    ops[4] = operands[1];
    ops[5] = GEN_INT (lane);
-  output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]",
+  output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                     ops);
    return "";
  }
@@ -5024,7 +5016,7 @@
  
  (define_insn "neon_vld4_dup<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
-        (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
+        (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4_DUP))]
    "TARGET_NEON"
@@ -5038,12 +5030,12 @@
        ops[2] = gen_rtx_REG (DImode, regno + 4);
        ops[3] = gen_rtx_REG (DImode, regno + 6);
        ops[4] = operands[1];
-      output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, [%4]",
+      output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                         ops);
        return "";
      }
    else
-    return "vld1.<V_sz_elem>\t%h0, [%1]";
+    return "vld1.<V_sz_elem>\t%h0, %A1";
  }
    [(set (attr "neon_type")
        (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
@@ -5052,16 +5044,16 @@
  )
  
  (define_insn "neon_vst4<mode>"
-  [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
                      (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4))]
    "TARGET_NEON"
  {
    if (<V_sz_elem> == 64)
-    return "vst1.64\t%h1, [%0]";
+    return "vst1.64\t%h1, %A0";
    else
-    return "vst4.<V_sz_elem>\t%h1, [%0]";
+    return "vst4.<V_sz_elem>\t%h1, %A0";
  }
    [(set (attr "neon_type")
        (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
@@ -5070,64 +5062,62 @@
  )
  
  (define_expand "neon_vst4<mode>"
-  [(match_operand:SI 0 "s_register_operand" "+r")
-   (match_operand:XI 1 "s_register_operand" "w")
+  [(match_operand:XI 0 "neon_struct_operand")
+   (match_operand:XI 1 "s_register_operand")
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vst4qa<mode> (operands[0], operands[0], operands[1]));
-  emit_insn (gen_neon_vst4qb<mode> (operands[0], operands[0], operands[1]));
+  rtx mem;
+
+  mem = adjust_address (operands[0], OImode, 0);
+  emit_insn (gen_neon_vst4qa<mode> (mem, operands[1]));
+  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
+  emit_insn (gen_neon_vst4qb<mode> (mem, operands[1]));
    DONE;
  })
  
  (define_insn "neon_vst4qa<mode>"
-  [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0"))
-        (unspec:OI [(match_operand:XI 2 "s_register_operand" "w")
+  [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+        (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VST4A))
-   (set (match_operand:SI 0 "s_register_operand" "=r")
-        (plus:SI (match_dup 1)
-                (const_int 32)))]
+                   UNSPEC_VST4A))]
    "TARGET_NEON"
  {
-  int regno = REGNO (operands[2]);
+  int regno = REGNO (operands[1]);
    rtx ops[5];
    ops[0] = operands[0];
    ops[1] = gen_rtx_REG (DImode, regno);
    ops[2] = gen_rtx_REG (DImode, regno + 4);
    ops[3] = gen_rtx_REG (DImode, regno + 8);
    ops[4] = gen_rtx_REG (DImode, regno + 12);
-  output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops);
+  output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
  )
  
  (define_insn "neon_vst4qb<mode>"
-  [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0"))
-        (unspec:OI [(match_operand:XI 2 "s_register_operand" "w")
+  [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+        (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VST4B))
-   (set (match_operand:SI 0 "s_register_operand" "=r")
-        (plus:SI (match_dup 1)
-                (const_int 32)))]
+                   UNSPEC_VST4B))]
    "TARGET_NEON"
  {
-  int regno = REGNO (operands[2]);
+  int regno = REGNO (operands[1]);
    rtx ops[5];
    ops[0] = operands[0];
    ops[1] = gen_rtx_REG (DImode, regno + 2);
    ops[2] = gen_rtx_REG (DImode, regno + 6);
    ops[3] = gen_rtx_REG (DImode, regno + 10);
    ops[4] = gen_rtx_REG (DImode, regno + 14);
-  output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops);
+  output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
    return "";
  }
    [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
  )
  
  (define_insn "neon_vst4_lane<mode>"
-  [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
          (unspec:<V_four_elem>
             [(match_operand:OI 1 "s_register_operand" "w")
              (match_operand:SI 2 "immediate_operand" "i")
@@ -5147,7 +5137,7 @@
    ops[3] = gen_rtx_REG (DImode, regno + 4);
    ops[4] = gen_rtx_REG (DImode, regno + 6);
    ops[5] = operands[2];
-  output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]",
+  output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                     ops);
    return "";
  }
@@ -5155,7 +5145,7 @@
  )
  
  (define_insn "neon_vst4_lane<mode>"
-  [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r"))
+  [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
          (unspec:<V_four_elem>
             [(match_operand:XI 1 "s_register_operand" "w")
              (match_operand:SI 2 "immediate_operand" "i")
@@ -5180,7 +5170,7 @@
    ops[3] = gen_rtx_REG (DImode, regno + 8);
    ops[4] = gen_rtx_REG (DImode, regno + 12);
    ops[5] = GEN_INT (lane);
-  output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]",
+  output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                     ops);
    return "";
  }
diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md

index 40ce1f3c8e9251eccaf9565c4efda62be00a1bbb..891a9749bbf8f967c94a100595bd7f61d31e7b1e 100644 (file)
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -683,3 +683,7 @@
     } 
    return true; 
  })
+
+(define_special_predicate "neon_struct_operand"
+  (and (match_code "mem")
+       (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)")))
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog

index 3eb7c49ef7e2d3d58d2d3da1150bfa44e3765348..b3fe075f0456ab3da27b4a26c061742477340afb 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-04-12  Richard Sandiford  <richard.sandiford@linaro.org>
+
+       * gcc.target/arm/neon-vld3-1.c: New test.
+       * gcc.target/arm/neon-vst3-1.c: New test.
+       * gcc.target/arm/neon/v*.c: Regenerate.
+
  2011-04-12  Jakub Jelinek  <jakub@redhat.com>
  
         PR rtl-optimization/48549
diff --git a/gcc/testsuite/gcc.target/arm/neon-vld3-1.c b/gcc/testsuite/gcc.target/arm/neon-vld3-1.c

new file mode 100644 (file)

index 0000000..0cc5c88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vld3-1.c
@@ -0,0 +1,27 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_neon } */
+
+#include "arm_neon.h"
+
+uint32_t buffer[12];
+
+void __attribute__((noinline))
+foo (uint32_t *a)
+{
+  uint32x4x3_t x;
+
+  x = vld3q_u32 (a);
+  x.val[0] = vaddq_u32 (x.val[0], x.val[1]);
+  vst3q_u32 (a, x);
+}
+
+int
+main (void)
+{
+  buffer[0] = 1;
+  buffer[1] = 2;
+  foo (buffer);
+  return buffer[0] != 3;
+}
diff --git a/gcc/testsuite/gcc.target/arm/neon-vst3-1.c b/gcc/testsuite/gcc.target/arm/neon-vst3-1.c

new file mode 100644 (file)

index 0000000..a3bee6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vst3-1.c
@@ -0,0 +1,25 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_neon } */
+
+#include "arm_neon.h"
+
+uint32_t buffer[64];
+
+void __attribute__((noinline))
+foo (uint32_t *a)
+{
+  uint32x4x3_t x;
+
+  x = vld3q_u32 (a);
+  a[35] = 1;
+  vst3q_lane_u32 (a + 32, x, 1);
+}
+
+int
+main (void)
+{
+  foo (buffer);
+  return buffer[35] != 1;
+}
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c

index 073d88f2b5e0a32deb859eafb6a28c6d58df1c90..fa9cf20f558c4bb96483b28005c50bb026376ad6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupf32 (void)
    out_float32x4_t = vld1q_dup_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c

index 1202e929a12c29fecee81a9a2387507ec9968d6d..4e830382571bc69bd4bec7dd720b312b43f1d971 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupp16 (void)
    out_poly16x8_t = vld1q_dup_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c

index 27d755097206269aed1ef8251eeb491f0a0e1c2c..70fb898850fcfbf6dd77bfc9f7ffd79f241b9a64 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupp8 (void)
    out_poly8x16_t = vld1q_dup_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c

index df1e00880d4833e468b595c9720d7e373dba2c8e..1fedcf94d2a5336e9228361f87bb7a889228435f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
@@ -15,5 +15,5 @@ void test_vld1Q_dups16 (void)
    out_int16x8_t = vld1q_dup_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c

index b371299bda072b2bd8db1f4e1ab26bd980eec9fc..2abd4e447402c6d7c7f09de3410fc4354c76eac8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
@@ -15,5 +15,5 @@ void test_vld1Q_dups32 (void)
    out_int32x4_t = vld1q_dup_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c

index b4c3a8cc9fe34a66f4f04b50a565b5a93f5fb895..912b93d1d6c6e352d93dfa21dc775c7494095487 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
@@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void)
    out_int64x2_t = vld1q_dup_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c

index badeb3b80455025eeb9c81c81cf784d762492187..e431a5cf108d946be95fd3122f1ecc82bb1c70f6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
@@ -15,5 +15,5 @@ void test_vld1Q_dups8 (void)
    out_int8x16_t = vld1q_dup_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c

index d247fea562054e4f68be0938b1db2f4e1e030ffd..6da756774f6c375b76a882bf6c3179be72b8757a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupu16 (void)
    out_uint16x8_t = vld1q_dup_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c

index 1160f9820b605bb7f5e5256f624a4a854a8fe1fb..8e400bd25f2916c4f682f5b6e0cb15ad0b0e3ffb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupu32 (void)
    out_uint32x4_t = vld1q_dup_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c

index 8cbc89c948289c61afa8c60f39faca47be0da4fb..234db407b37061f18f5be57dd2d195a5f1c63a51 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void)
    out_uint64x2_t = vld1q_dup_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c

index c6d52a3d74c931e349ca13e120aaf3a65d7326fd..b1e540d702e508a91b65909ddd0e97ac57214101 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupu8 (void)
    out_uint8x16_t = vld1q_dup_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c

index bccdd26c20961cccabccf46f5daa32728c977bef..8c7689edb05a819e0242c9f2b1309c4a3794f145 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanef32 (void)
    out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c

index f080107a66c109b866cdbad090fd4b2d5f389b21..163c2a7a95949f6c8af09aff9e2661a18ab6201f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanep16 (void)
    out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c

index 4887ebcd0c205c36106fc2a4eccd52a943470384..7f7a22eba4bd2f09459d48ee774acb48cfd4fc3a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanep8 (void)
    out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c

index aeb824c23332be92e6fc0f3eb8cebcd563e5a2aa..0d56492c257a2d19d629d38e638e6cc426410bcd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanes16 (void)
    out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c

index 90556ac9b2109905b2272c4b5e0b38e631e37070..3c5869fcdf58d708a575e7dd9c94cbacde8d2e75 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanes32 (void)
    out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c

index db68bd0873dbc28e1bf1d2fe41d2dc48e63e429b..154583b677d60e6928c3354179c6d79aff85a9a7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanes64 (void)
    out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c

index 3494c077dcd0368ae08fb5ed0e2b8e5e6f4aa3bd..a6aa3f804b454d9202891145a7d4a600a35f978e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
@@ -16,5 +16,5 @@ void test_vld1Q_lanes8 (void)
    out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c

index eb791e7d3996f7878587f6d7bbd3d50ed7a5341c..1653dd31cb6826ba76dcc37e1565c801d59fcb2d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vld1Q_laneu16 (void)
    out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c

index 3841c9b96b0dfbfa68d09ccae176027b1bdd8122..034e24d5266486a6328ef2f3e028abee60017ee5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vld1Q_laneu32 (void)
    out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c

index 082e6a625b823fc6646d81d01dcf7a14ea5f2019..ff92e91fcb8567a249f76ee8808af4a757d10901 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
@@ -16,5 +16,5 @@ void test_vld1Q_laneu64 (void)
    out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c

index 194f74912480d3bc933dadcb8fee595ca38b435f..be338f18707757be7f1d9d3cab82b002a83548a7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
@@ -16,5 +16,5 @@ void test_vld1Q_laneu8 (void)
    out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c

index 1c84b9127eed55ca044249c365001454ab6e156d..d792148d09a81bff71e9dcfe51af7e9c195ba438 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
@@ -15,5 +15,5 @@ void test_vld1Qf32 (void)
    out_float32x4_t = vld1q_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c

index f470da6bc6985d1834b03f4b31b414203dab2383..84bceb557e43e3092e8bf371f8ec8081768a7bf6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
@@ -15,5 +15,5 @@ void test_vld1Qp16 (void)
    out_poly16x8_t = vld1q_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c

index a46d48bc2eb01babb06c29dad3bacc9daca65745..e756b1bc7f712632ab18f42f24e9dab2c86d8d0c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
@@ -15,5 +15,5 @@ void test_vld1Qp8 (void)
    out_poly8x16_t = vld1q_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c

index 39ab3fe55c0d3251d166e44070b92bc4ecb17171..aaa29e982cbff2107f7e19902747d15766c9e670 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
@@ -15,5 +15,5 @@ void test_vld1Qs16 (void)
    out_int16x8_t = vld1q_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c

index e12e8d97a401e8f1d500e3f954b5ab5d44aec41b..14bc4221eaeb91e54c4d656b33c4860c162339f9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
@@ -15,5 +15,5 @@ void test_vld1Qs32 (void)
    out_int32x4_t = vld1q_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c

index 1c6aca4a872069075701be4be9fcf4c9f31baeca..093aee61a393bd500229b31bbdbd7fb8113f5951 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
@@ -15,5 +15,5 @@ void test_vld1Qs64 (void)
    out_int64x2_t = vld1q_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c

index 64e6b006444ce7fe9e270e78ab07a7ce57690380..d4fffd0a100829d511ba9611c6b1d7f7967f3868 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
@@ -15,5 +15,5 @@ void test_vld1Qs8 (void)
    out_int8x16_t = vld1q_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c

index 191deb0d76962474f71a082f39550ef2cac0799c..267f7d15bcc7333688e6b56567b4836ad3858594 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
@@ -15,5 +15,5 @@ void test_vld1Qu16 (void)
    out_uint16x8_t = vld1q_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c

index e3e01a6126899f213994a18a877b58d1e7f3a970..53ccab0c5b1c0db001ce46fc28c68e9614d5ef36 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
@@ -15,5 +15,5 @@ void test_vld1Qu32 (void)
    out_uint32x4_t = vld1q_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c

index 24b55bab12cc1a828b2d7b6353689d8e5d9616e9..56b0dbd3e62264aca77051268b405c806dbff1cb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
@@ -15,5 +15,5 @@ void test_vld1Qu64 (void)
    out_uint64x2_t = vld1q_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c

index 47e6ad07dea38d75e838614de39f1fd60669b2d3..d68fc89eaa0820b22fb999bdfbe2945d4c962c12 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
@@ -15,5 +15,5 @@ void test_vld1Qu8 (void)
    out_uint8x16_t = vld1q_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c

index 41eec0ef0a1d5634777ddceef7ae81847594fb19..6f8435b3629a3f30d37632b56dedcb62304d34c4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
@@ -15,5 +15,5 @@ void test_vld1_dupf32 (void)
    out_float32x2_t = vld1_dup_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c

index b38b29c72532de355940722ef1318b216e6749b8..1287b471b5692e3a9ae9247b566f152538cf0b4b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
@@ -15,5 +15,5 @@ void test_vld1_dupp16 (void)
    out_poly16x4_t = vld1_dup_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c

index 69017c4ac595c270452c05702738cc58bce0fcfc..8fde645535590dcb51a5a71fa759b1619ec5a80d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
@@ -15,5 +15,5 @@ void test_vld1_dupp8 (void)
    out_poly8x8_t = vld1_dup_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c

index 61e0377fa4cc35ca6e40d6efd953bff103f00572..084f89e064a6c859992eca12139a972bbf1e70f7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
@@ -15,5 +15,5 @@ void test_vld1_dups16 (void)
    out_int16x4_t = vld1_dup_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c

index 0429ee513a66b595aeff021bb6d30de6514555fa..ba6697a4ce637875d09eea6df744945b40345d3e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
@@ -15,5 +15,5 @@ void test_vld1_dups32 (void)
    out_int32x2_t = vld1_dup_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c

index 90ee403d663bcfe289a2fe1c8828212231b25257..410ee6fcd5e7c0087393890150f774874bd494fa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
@@ -15,5 +15,5 @@ void test_vld1_dups64 (void)
    out_int64x1_t = vld1_dup_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c

index aacac04bb133e95c023d02c7a94fd29f1fcc161d..18b21b527a44c85fa74b0864c1b2b29c751808d2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
@@ -15,5 +15,5 @@ void test_vld1_dups8 (void)
    out_int8x8_t = vld1_dup_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c

index 64d736298ba74d5e6b6b17bcf5bab23f0a49ad68..1d893cd3b8a0968d8120151e80f8f4f5a818a8ff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
@@ -15,5 +15,5 @@ void test_vld1_dupu16 (void)
    out_uint16x4_t = vld1_dup_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c

index 6f3fd967e115d38df36f6a2817efbcefadf4fb57..f640846403a21a66119e104ba4ba566490784147 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
@@ -15,5 +15,5 @@ void test_vld1_dupu32 (void)
    out_uint32x2_t = vld1_dup_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c

index 262147d79ee78b5fb4e9561a43e912a940d04d24..17be90a0bcd2c60b5fe7fe920c108a229788e082 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
@@ -15,5 +15,5 @@ void test_vld1_dupu64 (void)
    out_uint64x1_t = vld1_dup_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c

index 6038bec9caac673786e5e3578efc7595f933a2d4..5811f25fb4d464611930b2141426440a4c1a80b4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
@@ -15,5 +15,5 @@ void test_vld1_dupu8 (void)
    out_uint8x8_t = vld1_dup_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c

index 3d4b0a4de6e03b5fe9415fd70946ab8edd642774..6165897ecf875e35faa53b035627b471cb1ea5ee 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
@@ -16,5 +16,5 @@ void test_vld1_lanef32 (void)
    out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c

index 832abbd2a1c5276a536d81363f300f20f6472289..feecf1baa2954a66a0106f8f1d2f0b6a6d984192 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
@@ -16,5 +16,5 @@ void test_vld1_lanep16 (void)
    out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c

index 04823322e04fbfc21494de6faaf4d51b4d4a395b..0d172993653175beb4fc3be040c9b085e211a376 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
@@ -16,5 +16,5 @@ void test_vld1_lanep8 (void)
    out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c

index 571f87673f4a4b53931073bd56a79dec23393393..26272410e3653914e39a3f6abe582f9ca5a85526 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
@@ -16,5 +16,5 @@ void test_vld1_lanes16 (void)
    out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c

index 057a7ffc30e62a58e06253042e637b5156472018..39575d4568031e4839f884c687a68dfcbbca3d37 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
@@ -16,5 +16,5 @@ void test_vld1_lanes32 (void)
    out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c

index 1e46d6a1f967e3ffe11904287c6134b2331bb61c..1216405bfc701b0b86c1d925b8e9db043a4037b0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
@@ -16,5 +16,5 @@ void test_vld1_lanes64 (void)
    out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c

index eeebc9bbd09ae3c046ca73a9e51450eec987111d..7c763fd909bcae6e94e82062adf2af2ef32c32b6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
@@ -16,5 +16,5 @@ void test_vld1_lanes8 (void)
    out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c

index 116a35f03b4b9c8f4415cb9290bbab7293907409..9d2c45ed93b54a200eb5e015c9c6d21e3f7c4532 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
@@ -16,5 +16,5 @@ void test_vld1_laneu16 (void)
    out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c

index f4907d202b2ac0c4cecfd7c75e8645e721e81714..3a7f3eec96b92746b82f190c8809dccd848db0c1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
@@ -16,5 +16,5 @@ void test_vld1_laneu32 (void)
    out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c

index b5058b0f806eacba990297c1659bb3ef8b3b2831..b9e5d2042e1b8cc78a6a1e7ae921d4f08aab48f7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
@@ -16,5 +16,5 @@ void test_vld1_laneu64 (void)
    out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c

index caa08f637235e7f6226f2eeef591137971404b0c..7e4835afe42ae057f5128900df6e54b6a75eab54 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
@@ -16,5 +16,5 @@ void test_vld1_laneu8 (void)
    out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c

index 17deac967cb90964b8de2f5fe46d222e5473aa7d..2d90ac5590289f14b25811130b516155325093ae 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
@@ -15,5 +15,5 @@ void test_vld1f32 (void)
    out_float32x2_t = vld1_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c

index ef2e73ac5988198e942d4554a131d0c4a8449e86..62aa89e8af9c4c90f7c6138216260c541408c455 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
@@ -15,5 +15,5 @@ void test_vld1p16 (void)
    out_poly16x4_t = vld1_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c

index 048bdeb06b2830ff23c260a80e7e6039b0118952..60e47c2d567e8a8aaf8e71e4b02ce8e52890432d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
@@ -15,5 +15,5 @@ void test_vld1p8 (void)
    out_poly8x8_t = vld1_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c

index 39e12d76cd12a5af2a6d314f7881e921edac89bc..1d4cf525fd5771c41b7650c8ecfa907d033e7bde 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
@@ -15,5 +15,5 @@ void test_vld1s16 (void)
    out_int16x4_t = vld1_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c

index 80fbfd07d70d19e14962b7c1b2e7122d1bab1ea2..7af67c383a1e75741639cdbe730b3d82c11e7b62 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
@@ -15,5 +15,5 @@ void test_vld1s32 (void)
    out_int32x2_t = vld1_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c

index 3ea125d36bbd8c60494910cd25eb5fa15f7b88ac..dadb9de226498ff99f1bd442eb5312f422a08c6e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
@@ -15,5 +15,5 @@ void test_vld1s64 (void)
    out_int64x1_t = vld1_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c

index 599c32345359eda86021420556ebc77b2a8fb6dc..c27ebcd061f368628ced5867f8d700a42253d0a0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
@@ -15,5 +15,5 @@ void test_vld1s8 (void)
    out_int8x8_t = vld1_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c

index 550ca118b6fae75ee6a1d7d37c85f88967a61b3e..f973d6ec5caa15a38b095914da560b2b6ba9ebfb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
@@ -15,5 +15,5 @@ void test_vld1u16 (void)
    out_uint16x4_t = vld1_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c

index e0b673cf8b18ee61e13b2abc7c575d9be9f37e22..4b455b2929014f0362a1e514a8cf6666aa4f432b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
@@ -15,5 +15,5 @@ void test_vld1u32 (void)
    out_uint32x2_t = vld1_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c

index eba002cd7db61c7f3941b360d11b2adbfc5001b3..1504215d8e8afe189e8d015d5f664281756022bb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
@@ -15,5 +15,5 @@ void test_vld1u64 (void)
    out_uint64x1_t = vld1_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c

index a63bcf2cd4b26209364436e304a8e46f05785848..600d0351843ddd5bfcd8f3ab1f91dbccd838b8c2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
@@ -15,5 +15,5 @@ void test_vld1u8 (void)
    out_uint8x8_t = vld1_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c

index de05fd78f4b347fe02785303b392e037f3798ed6..9afbbecf72013dab06925fe321dc3e8f3ccf5505 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vld2Q_lanef32 (void)
    out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c

index 30dd2d9b72cf062e97fdcb66676a150dce858c8a..e1b85aad9d404c0d8bfbb8f3c4d485aa8d3417a2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vld2Q_lanep16 (void)
    out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c

index bc256dd67d51a1ffa404e4764fe33fb899228ecc..467c02b64bc208c98f2d0a47b891a679822c50ab 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vld2Q_lanes16 (void)
    out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c

index bf184df22c5eff42096317283023bb21eac562a2..5f9c4a8b2395046e2212060d63b54503ac9158bf 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vld2Q_lanes32 (void)
    out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c

index 37919becf454c82bfe51046aa74c78fd347fb001..851572917bf37a220919f1478079b7d5e4ac5056 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vld2Q_laneu16 (void)
    out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c

index d42638cd1599dcdb11226123130033b3fdc8c966..65ec23a6f42ffbba9d28b8c5cc94dd311abbedf4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vld2Q_laneu32 (void)
    out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c

index 6e7d1d3d53330faa23051ae255a2f1e3baaaf0e4..afde42c20a00e1007dc4fdf7fe9f1b33dae5ab0d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
@@ -15,6 +15,6 @@ void test_vld2Qf32 (void)
    out_float32x4x2_t = vld2q_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c

index 18ee431698df50f3e9085a9982118cbe40fa8c48..f74004628deebc07e898005097a6328bfdc59e7e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
@@ -15,6 +15,6 @@ void test_vld2Qp16 (void)
    out_poly16x8x2_t = vld2q_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c

index 4751de7b8ab052966dbd8b3f5a14f936b5c3e568..9e4ff25f3dfa6a66e680f018e0905faaf3d722db 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
@@ -15,6 +15,6 @@ void test_vld2Qp8 (void)
    out_poly8x16x2_t = vld2q_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c

index 638f24accf2937eef8551642455bf10497c7f608..97c8a2c5f8a0d5c2a3e67b025459aea2d2f1fa21 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
@@ -15,6 +15,6 @@ void test_vld2Qs16 (void)
    out_int16x8x2_t = vld2q_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c

index 51d7dc87fb8fb377e9d080626ec33328b203ea72..cd03e17d2e10c2859e2199f5c49a942bec3230da 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
@@ -15,6 +15,6 @@ void test_vld2Qs32 (void)
    out_int32x4x2_t = vld2q_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c

index b3fb47d55fcaad46d1d91be47b6716fdbccee60e..b33a5a8f4ef7d0a583a99b5726fc07a553d0c98f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
@@ -15,6 +15,6 @@ void test_vld2Qs8 (void)
    out_int8x16x2_t = vld2q_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c

index 7955de6aec49bd68d0248694a3f789a26280c6bd..76169af569d4051b83fc24392b779e413c387e5e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
@@ -15,6 +15,6 @@ void test_vld2Qu16 (void)
    out_uint16x8x2_t = vld2q_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c

index 6099c06c62c699dd0b15212b6fcf0cca33fd813d..347e164bf096311453d83678cd557d20ae68e8ee 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
@@ -15,6 +15,6 @@ void test_vld2Qu32 (void)
    out_uint32x4x2_t = vld2q_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c

index 82632ed383e80e3331f6cbff449f84c924ed3a0d..3b738a7aeded09d315fdc6ba9f4fe25bb78bf226 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
@@ -15,6 +15,6 @@ void test_vld2Qu8 (void)
    out_uint8x16x2_t = vld2q_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c

index aa74e38ec49183f1f0bc4009ccdbc037df446af6..54fbd3da9742486a6052f55db7218a3eaabf636e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
@@ -15,5 +15,5 @@ void test_vld2_dupf32 (void)
    out_float32x2x2_t = vld2_dup_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c

index 71be4c12790283a533789ab32f4ab0862ddc9f17..b5ec4e227f28e812d5070cf79da40ecd293dad68 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
@@ -15,5 +15,5 @@ void test_vld2_dupp16 (void)
    out_poly16x4x2_t = vld2_dup_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c

index 17d4ec1b73624ae828b29210773b7400586d5c6f..2ad81b53ab7d99eb8c190f2638916b5b72ec07b1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
@@ -15,5 +15,5 @@ void test_vld2_dupp8 (void)
    out_poly8x8x2_t = vld2_dup_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c

index 128e715bec818705fa3dba55416860527cf6faad..43b245d3de35330de82a74ba9688f3f58a8cdafb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
@@ -15,5 +15,5 @@ void test_vld2_dups16 (void)
    out_int16x4x2_t = vld2_dup_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c

index 41461be87254437ae28fee89de4fb2e370fa9f7f..51e4fc8e63bf7c492f5a00cdb47ee56b6a983f05 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
@@ -15,5 +15,5 @@ void test_vld2_dups32 (void)
    out_int32x2x2_t = vld2_dup_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c

index e9d4b53823cf6706939e9821de16920c3ea1dab5..644db84cab233f958df772d9142b8722e8c8aaa3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
@@ -15,5 +15,5 @@ void test_vld2_dups64 (void)
    out_int64x1x2_t = vld2_dup_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c

index 8b3f7979ae1a59d2224db937ef9404df696919b7..015923392037d44cf9cb6d92af7f32f287b7a055 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
@@ -15,5 +15,5 @@ void test_vld2_dups8 (void)
    out_int8x8x2_t = vld2_dup_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c

index 6b9df90eb9289aa1e951e74c8da406d71427f73d..85bbc4681f142c421b9f6d73883162a71b9ce4c6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
@@ -15,5 +15,5 @@ void test_vld2_dupu16 (void)
    out_uint16x4x2_t = vld2_dup_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c

index d34acecf5cead6702a88ca4d1bdffc976abcea88..3549fde1ca9a7aa05a4cd990c719acac18d6009c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
@@ -15,5 +15,5 @@ void test_vld2_dupu32 (void)
    out_uint32x2x2_t = vld2_dup_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c

index 16b046574043cdcf848962077b741f7bd0c1edc6..a830f8310211dd1525c9de72f41c0c43b554fc6e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
@@ -15,5 +15,5 @@ void test_vld2_dupu64 (void)
    out_uint64x1x2_t = vld2_dup_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c

index 94c80a98199d472b3e24ea396c88278d6be1914e..c3763c8f2c601e2fe72e64b127e3314b4d51367e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
@@ -15,5 +15,5 @@ void test_vld2_dupu8 (void)
    out_uint8x8x2_t = vld2_dup_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c

index 2e02a2831a51b443767262ca5e4497be8bd9059f..f60279efd0a5ec32a4f7c8b584d7a87130e25657 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
@@ -16,5 +16,5 @@ void test_vld2_lanef32 (void)
    out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c

index d52864b8957eff26c91858371c8e759bdea90703..0d7f415b77e9d593059f5600497ca53b4388cc8b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
@@ -16,5 +16,5 @@ void test_vld2_lanep16 (void)
    out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c

index 07938a1877c9c8326012e0af389aa39920345fdf..8174e7bee03fbea0d89b1816daa5c6f6ec87d6a6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
@@ -16,5 +16,5 @@ void test_vld2_lanep8 (void)
    out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c

index c19aacf514242b0422e14b2f2e2ff565616df3a3..5a1eb54bdcc148361f29eaebd52a326f5213464e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
@@ -16,5 +16,5 @@ void test_vld2_lanes16 (void)
    out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c

index 6394d9a3488fbe9c778053a93350c75d78fcd2cd..a663c52ff9db07961e0fb5258be1a7a9b5b19c35 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
@@ -16,5 +16,5 @@ void test_vld2_lanes32 (void)
    out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c

index 603d3234cf702179eeb3d0b5fc7ce3cf977fb0a0..073ba54179c6637700cbf6c065aa2bb26df996f8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
@@ -16,5 +16,5 @@ void test_vld2_lanes8 (void)
    out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c

index e6a873b12c1755e49214d7ac1111d9abc5014644..7250b562ed34e5ee62bc0c41d85c82a4a7487b1c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
@@ -16,5 +16,5 @@ void test_vld2_laneu16 (void)
    out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c

index 58e806faa40f06e8646d0e4b063d43d864e536e2..9a46c65d00b3fee6578ebfe88fbb5e95e30ba91c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
@@ -16,5 +16,5 @@ void test_vld2_laneu32 (void)
    out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c

index b662354f823e69671ee0568b8cab3ea770f3d136..ba2007109b8479adf03b882d6c7dd6e1ff3abe1d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
@@ -16,5 +16,5 @@ void test_vld2_laneu8 (void)
    out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c

index 75974376a9691953c74cfd97903f08cb703fcb8d..c790de94125dacc3d296e5a4c1606e43dd4c8a03 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
@@ -15,5 +15,5 @@ void test_vld2f32 (void)
    out_float32x2x2_t = vld2_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c

index f166d3554e14f79c9f429448d798b4d3a66e3a95..4c4338cfc14bfe5828103e781bd45e604978ae31 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
@@ -15,5 +15,5 @@ void test_vld2p16 (void)
    out_poly16x4x2_t = vld2_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c

index 612fab6fa754121d60a48003222442275b4c4073..d319c22e2f94465868949ebf7e1a10935440b977 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
@@ -15,5 +15,5 @@ void test_vld2p8 (void)
    out_poly8x8x2_t = vld2_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c

index 70f6af946b3b0700186abe7f7bb802a5dcc856cf..f725d79de5b039f200f92b156b52f1bded573f42 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
@@ -15,5 +15,5 @@ void test_vld2s16 (void)
    out_int16x4x2_t = vld2_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c

index 4a84effcc879d57c2a2f9f6bde46b5b285718772..3f417eeee9c66f0e2ec672bbfeb0864683c71654 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
@@ -15,5 +15,5 @@ void test_vld2s32 (void)
    out_int32x2x2_t = vld2_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c

index 0a388d0901ed34bdbcb4ef610871cb3a212059dd..b9900893fd169432c64202b0eaa4bccd9c6725cb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
@@ -15,5 +15,5 @@ void test_vld2s64 (void)
    out_int64x1x2_t = vld2_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c

index 110e88320fb99d26c96417a9d9297f6f5e37e622..1df9eee6fcd20604e514495d02baaba8ac5cf825 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
@@ -15,5 +15,5 @@ void test_vld2s8 (void)
    out_int8x8x2_t = vld2_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c

index f2e721bf821adb5c11743b31720aeddc1456e2b2..7440e0c08796f605ab4f4ecd4e8c0db163a83702 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
@@ -15,5 +15,5 @@ void test_vld2u16 (void)
    out_uint16x4x2_t = vld2_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c

index f0f069e9836f89cc43d1be87946269ac45066e27..940fd749776c37f770284a6a26a9ecc1364204ec 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
@@ -15,5 +15,5 @@ void test_vld2u32 (void)
    out_uint32x2x2_t = vld2_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c

index 1d2a3bccb309570018868f83618018844fe1ca76..35c046a0c5508ca1ac0205423e870807294d1683 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
@@ -15,5 +15,5 @@ void test_vld2u64 (void)
    out_uint64x1x2_t = vld2_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c

index eb0c5a6d4fab28e5d925605b805d183fc43e2b12..2231e26c0730950900def871f01f7712ac74e398 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
@@ -15,5 +15,5 @@ void test_vld2u8 (void)
    out_uint8x8x2_t = vld2_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c

index 6c6f52032f85bded0b187e6b72181cd07540e769..6bdc1e14adedad2080f28014fc196380b65b7282 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vld3Q_lanef32 (void)
    out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c

index e4e60bc65fd20c43ac44ef505727c77d0a2b8626..12b3be0efa7ca65af7ff5ca2a87af053d48a0945 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vld3Q_lanep16 (void)
    out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c

index 0456d3b4bfe057985a50c6f22e05ddda2f313b1a..8ed21e3d7ca2bd9bdc5026421eeb7deed14bfabc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vld3Q_lanes16 (void)
    out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c

index fca11ae20245585f33635a920f28f82c592ac1ba..af0118da001839bfef0d83f1fa92b2f7d6abdaa1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vld3Q_lanes32 (void)
    out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c

index 56c94b2f264144ba0cbbefa703d5989370c5a35c..7880b98e49fa6b59ab2fcb8267a019ecf8bdd9b3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vld3Q_laneu16 (void)
    out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c

index a73a5a2662e14314a7acbe46247a0072ed37db29..0b1bce5c537da49cf80c05de4e5db79c0ca86074 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vld3Q_laneu32 (void)
    out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c

index 45899176953457ed5b7d278b7ab52c4441a4699c..6f16d9d870b045259a3c1c62371f6077d8d34640 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
@@ -15,6 +15,6 @@ void test_vld3Qf32 (void)
    out_float32x4x3_t = vld3q_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c

index 8c3e5beb4d3ac5aebc8a9c1e1e29234ec18b7ef2..ff4ef8653be52193c5735da0a732d5e3d7e37fde 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
@@ -15,6 +15,6 @@ void test_vld3Qp16 (void)
    out_poly16x8x3_t = vld3q_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c

index 0197f51751758d83fbe8335e689216f2558ba732..a23749378cb733f148f09c9b86e0283ef390b7eb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
@@ -15,6 +15,6 @@ void test_vld3Qp8 (void)
    out_poly8x16x3_t = vld3q_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c

index ea7709690b1447a94b6b14428909982292172253..cfa01367f558b31e35e4cb791f3ddb947e4e2094 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
@@ -15,6 +15,6 @@ void test_vld3Qs16 (void)
    out_int16x8x3_t = vld3q_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c

index 10896957fe5fd98b503b1270a642cae69dced5ca..e1721ef3dfe78b9d51d9abc864a812fb918c6cd8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
@@ -15,6 +15,6 @@ void test_vld3Qs32 (void)
    out_int32x4x3_t = vld3q_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c

index ca389ad1c43c9252ec696f53f6c04777967fa536..9f762ca6fb36b77b4b96d46803cae2db01409de8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
@@ -15,6 +15,6 @@ void test_vld3Qs8 (void)
    out_int8x16x3_t = vld3q_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c

index efef26fd759f16a6f7257b3341fa291b00e1b0b2..a2308729fddf07a3301709ec1a18e672cb19d826 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
@@ -15,6 +15,6 @@ void test_vld3Qu16 (void)
    out_uint16x8x3_t = vld3q_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c

index 077533c2bedb83c30cb6ef46d0b702f83e92eac1..21f20f880eb9e6a355eb75b7ca1c794dfe1082d1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
@@ -15,6 +15,6 @@ void test_vld3Qu32 (void)
    out_uint32x4x3_t = vld3q_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c

index c8093b8c1a73fc430c2770b75b744a4c220ac9f1..7cbcc46908ed7048dda2f5c80c21b50d7a755efb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
@@ -15,6 +15,6 @@ void test_vld3Qu8 (void)
    out_uint8x16x3_t = vld3q_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c

index e38a13541386961350b0cb62f6549c3fa966f72a..54233697169a69ed482b9e2aa399f2229b8098df 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
@@ -15,5 +15,5 @@ void test_vld3_dupf32 (void)
    out_float32x2x3_t = vld3_dup_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c

index d9f3d14bc448079381c27301d908fcbc55be47ce..6c08c8343ca3567d36939f5f48addca5ec2d4d78 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
@@ -15,5 +15,5 @@ void test_vld3_dupp16 (void)
    out_poly16x4x3_t = vld3_dup_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c

index 43c7fe8e22976710d14b1723806baa69af1aa3af..fd4a6603fe8b0a15e0e76f52a0b5c06ccfc1e7e8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
@@ -15,5 +15,5 @@ void test_vld3_dupp8 (void)
    out_poly8x8x3_t = vld3_dup_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c

index 8fec7c5120375225c0ae61474e4afb4587dc1544..4c11e7ef8eeebdc3b3cdc49c6ef5e11cbfbc1e6f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
@@ -15,5 +15,5 @@ void test_vld3_dups16 (void)
    out_int16x4x3_t = vld3_dup_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c

index 1118d2467e0a03009479992ce13a5e785eb0dc28..b500c24a9016b7bec7b959aecb95062db39ed769 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
@@ -15,5 +15,5 @@ void test_vld3_dups32 (void)
    out_int32x2x3_t = vld3_dup_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c

index 2e49c0ed9897759fced6425cc18a03d1c991784f..cf11f5c1c7ce7cbe56c4124e73f61adcf5a2d86e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
@@ -15,5 +15,5 @@ void test_vld3_dups64 (void)
    out_int64x1x3_t = vld3_dup_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c

index 7327c9fca0852c9a2006bb55e054026f53b338bb..4f0c8300dec5578801a5766ab59fd9e53fcf1901 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
@@ -15,5 +15,5 @@ void test_vld3_dups8 (void)
    out_int8x8x3_t = vld3_dup_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c

index d188fad7543737649d99d4833b4a0501681f54e1..57e3597bf142cee19ecba67b6f4531f11dd378d5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
@@ -15,5 +15,5 @@ void test_vld3_dupu16 (void)
    out_uint16x4x3_t = vld3_dup_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c

index 17436e047b561b0fd8746fea475a9af329262f2d..e4abde4f38a6f62f90c0fea84c805ae91397d83d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
@@ -15,5 +15,5 @@ void test_vld3_dupu32 (void)
    out_uint32x2x3_t = vld3_dup_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c

index cedf058298eded036f45f5d39cc92d1892230dd5..a9171262386f7698834f5aba1ccd7203c5a56fea 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
@@ -15,5 +15,5 @@ void test_vld3_dupu64 (void)
    out_uint64x1x3_t = vld3_dup_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c

index 1ebe61594100cc21cb61f0b7a07463e09885b53e..84261878529b53fbcc0cd5af84082a97c4013893 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
@@ -15,5 +15,5 @@ void test_vld3_dupu8 (void)
    out_uint8x8x3_t = vld3_dup_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c

index 3ee94ed0bb5e914683aa8724385ad416a77364c0..ccbe45f00c6ecc4f98b7a8d23d8af38d3715a8c9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
@@ -16,5 +16,5 @@ void test_vld3_lanef32 (void)
    out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c

index 3c8598869e23fc7e2c85c030a5bf0bc4542ee354..94b4ce4215203bfcc78d8478a6bd97a8efda62a5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
@@ -16,5 +16,5 @@ void test_vld3_lanep16 (void)
    out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c

index f5f9761d03d89f87bcb4cb6fa1cc9f1f59f7603b..12b0786bdc63decf0bacb0cffe641b9ca9ed1b99 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
@@ -16,5 +16,5 @@ void test_vld3_lanep8 (void)
    out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c

index 51cf8a3cf96bfed592f6013e03cddb7d9e2082e5..5ab744fc2bdb4754bb2b63bd8da21ffb3501e980 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
@@ -16,5 +16,5 @@ void test_vld3_lanes16 (void)
    out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c

index 59a29f77e2f956b0848e24a5fe407e9ae2fe405d..168f3f3639ae749af26a784300bd27b19032dfb0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
@@ -16,5 +16,5 @@ void test_vld3_lanes32 (void)
    out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c

index e4513aeb960c2a196e076acaa1f39f2682203af2..9d0d1a4b563762399cf4b8a1122f92a86c62081a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
@@ -16,5 +16,5 @@ void test_vld3_lanes8 (void)
    out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c

index 86a787c09abdc6a0f0b3fc2d970d98da1077e598..baf97a98a886964f1d077b6e0649d750a3547b31 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
@@ -16,5 +16,5 @@ void test_vld3_laneu16 (void)
    out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c

index e4bca9e39fca3a2f08e8400e0072f5cbc053d5fe..05d7107f2e9b9537bff2cfb1ef31b3ea1094eab2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
@@ -16,5 +16,5 @@ void test_vld3_laneu32 (void)
    out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c

index 554178a735bde79fe2f64e1771662e883db03c96..af7556350698add02f7c7bed701782fbf60e0071 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
@@ -16,5 +16,5 @@ void test_vld3_laneu8 (void)
    out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c

index ba18fe0d30091fdd10cb21996dd474541807530f..120f834d5b93d7f5c2a21933c6b6a1fe0319f7a5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
@@ -15,5 +15,5 @@ void test_vld3f32 (void)
    out_float32x2x3_t = vld3_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c

index 513a3ad77a5334b797d7ea2a52a4e44f49863486..2c47f5e8e56d4ab73d9bcb6e91cd900c8ab25f29 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
@@ -15,5 +15,5 @@ void test_vld3p16 (void)
    out_poly16x4x3_t = vld3_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c

index c93984ea7eda3decbe573519b705aa210f76a171..77c2462e2c9fcd4a745501c7dc3d519041faf1ea 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
@@ -15,5 +15,5 @@ void test_vld3p8 (void)
    out_poly8x8x3_t = vld3_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c

index f9e6212bd40c8add591d02914acd76531be4461c..355ede8c8eb6f7898a61d9b8d616d62ab2b73bbb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
@@ -15,5 +15,5 @@ void test_vld3s16 (void)
    out_int16x4x3_t = vld3_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c

index cd1256649b2e56e9b140aa1e9af13008cf39cc5e..8d18a8843cef7e42eebd44478f05ed7c1a8c841f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
@@ -15,5 +15,5 @@ void test_vld3s32 (void)
    out_int32x2x3_t = vld3_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c

index 5a62f84ccf843ada1dc12660fd2d6a43540b73b0..67bb3568f99cf4457a5b6f8a758d32403299a08d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
@@ -15,5 +15,5 @@ void test_vld3s64 (void)
    out_int64x1x3_t = vld3_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c

index b3c3125f9336bcd7a38eb33065dcf30a23decf5f..1be5d11bf8660895687fcecf30572fdbe512181a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
@@ -15,5 +15,5 @@ void test_vld3s8 (void)
    out_int8x8x3_t = vld3_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c

index 0cd54998658617660930129a0cdd1db76e213de3..4db18f04987d15a22a219dfd69e8852b96d819da 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
@@ -15,5 +15,5 @@ void test_vld3u16 (void)
    out_uint16x4x3_t = vld3_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c

index bdb66e00080e2f6df48abe2e38b9ccc9a4c758e4..82c10ff1602cbad9785395c869ddd46fd0c34ccd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
@@ -15,5 +15,5 @@ void test_vld3u32 (void)
    out_uint32x2x3_t = vld3_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c

index ba9465d4e8582a650c1f81002a602fe8af9e0e78..bca1df48f10519d8e594b1f182e6e21bbb436985 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
@@ -15,5 +15,5 @@ void test_vld3u64 (void)
    out_uint64x1x3_t = vld3_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c

index ec6e2a4db4692f163b569b3bcd0cdd810da7c6f0..c8ac20af1a4515689c2af1e12363bec648f3aad5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
@@ -15,5 +15,5 @@ void test_vld3u8 (void)
    out_uint8x8x3_t = vld3_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c

index 9e596b71bbf3b218bb36debf8ba128d09ac0506d..5c2499cdc61d1a1b6dda9d19c56810af9c915071 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vld4Q_lanef32 (void)
    out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c

index 3ca293a8837ec0c3e299e7bdb0e857fd8f7905e1..1d2d84e63707473587721f59b5edc0856ae1bac7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vld4Q_lanep16 (void)
    out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c

index f6de5e378e32ea6e45103854fc6c0ac22b8a78ba..df23d281c6b61a5549994bb6e782a41a1f20416d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vld4Q_lanes16 (void)
    out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c

index 0c3c0715161941490d1ea1d39739c56bc57be105..db1daff7b8da829cc002764d12ad9661b38e8af9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vld4Q_lanes32 (void)
    out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c

index 301cf8f24a2a58467d23cca4d1a9ec21f9c34114..e2da0ea27c4e42ebd1e489c84b8c73032aa6aa60 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vld4Q_laneu16 (void)
    out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c

index 4ff7a9d7b7454ec4aa3272545c85205daeecd590..d2960ecfc4a2b1ab7c09ae464a7ab237d73063cf 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vld4Q_laneu32 (void)
    out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c

index 2b59415cc9a5c37532aa702c270d59a81b1cb56f..0a6e7e6bea4ecb0b68767412377b77116606dc86 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
@@ -15,6 +15,6 @@ void test_vld4Qf32 (void)
    out_float32x4x4_t = vld4q_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c

index 510e0f20cf7c3dd50d0a57681c0cd3423b5043be..5d902f531dd110ed2749c507fdb6998ccd1e1f4c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
@@ -15,6 +15,6 @@ void test_vld4Qp16 (void)
    out_poly16x8x4_t = vld4q_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c

index c89ae63496e06d78a91ec39fbce5beb909a5b7f8..e6d66b048a0e9e290a71c1a8c3b4c6c769a40f38 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
@@ -15,6 +15,6 @@ void test_vld4Qp8 (void)
    out_poly8x16x4_t = vld4q_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c

index 98f42705f8e565e55b242d5d4af7c7a1e6823da6..04394215d59cfd7b864bd424dc3e7e208b3f8f79 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
@@ -15,6 +15,6 @@ void test_vld4Qs16 (void)
    out_int16x8x4_t = vld4q_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c

index 16d6133c601e49df1c8bceeada198cdc728b476a..4101fa1bf9d41ab7479232e2bc19a0164320df42 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
@@ -15,6 +15,6 @@ void test_vld4Qs32 (void)
    out_int32x4x4_t = vld4q_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c

index 3a4620f789698e9d8803c2eb11486d2f21f52294..9e74f1e4beca35c5532cf9fc69d3ee7a1a2f9d0e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
@@ -15,6 +15,6 @@ void test_vld4Qs8 (void)
    out_int8x16x4_t = vld4q_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c

index 197adf8115e565e9e8ac8f755fa33fe1aaabc4be..6b84331f6473439dd9f86d1faf0946af894dd418 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
@@ -15,6 +15,6 @@ void test_vld4Qu16 (void)
    out_uint16x8x4_t = vld4q_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c

index 942ccfb743a73b9bf0d8efd1cb8ea833bed0e996..55f7e93e928034591760de502cd4dd11456519c0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
@@ -15,6 +15,6 @@ void test_vld4Qu32 (void)
    out_uint32x4x4_t = vld4q_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c

index 93dad16033296a85e58439483bdac582c0ce4fe1..9c766c127fef83698a31a96d2a5c6351600adb3b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
@@ -15,6 +15,6 @@ void test_vld4Qu8 (void)
    out_uint8x16x4_t = vld4q_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c

index c7fe78ff6c243e7bc62c2e74afe6f8ecd6ce8818..5315db2d17658e1fb65a2a4153aa15e47fc7ca30 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
@@ -15,5 +15,5 @@ void test_vld4_dupf32 (void)
    out_float32x2x4_t = vld4_dup_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c

index b88a76c2fdf34595c8233e5c057c43724bbf0999..7ed8224cfcd919242e31355c40965fe3274c8156 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
@@ -15,5 +15,5 @@ void test_vld4_dupp16 (void)
    out_poly16x4x4_t = vld4_dup_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c

index cc9d17e70977c4e41006939ef187921dc0982741..ca1f8fa9810a35f0dbfe3a021a406874668acd1e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
@@ -15,5 +15,5 @@ void test_vld4_dupp8 (void)
    out_poly8x8x4_t = vld4_dup_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c

index c167f01c4ed7761913c110dbb09c5128b8e54cec..43dab8f2e9d2efa3263032a9c905794ffe923a16 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
@@ -15,5 +15,5 @@ void test_vld4_dups16 (void)
    out_int16x4x4_t = vld4_dup_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c

index 8279d31b810c09ab45a7b0d97964a25262ef43e4..183e3e9ef20166b55b9a89aba77b315c19466fcb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
@@ -15,5 +15,5 @@ void test_vld4_dups32 (void)
    out_int32x2x4_t = vld4_dup_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c

index 30b1b2b9a0d8a2a9a55b4a77c4c70293357976bd..f4c50493a3aa302066bf3e73a946a6f92a7eab55 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
@@ -15,5 +15,5 @@ void test_vld4_dups64 (void)
    out_int64x1x4_t = vld4_dup_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c

index 1775b524c62d6fc0a9b6a892ab12b244d074c010..3a4684a0977c2779e2e3c2eafbdc0e5464e027da 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
@@ -15,5 +15,5 @@ void test_vld4_dups8 (void)
    out_int8x8x4_t = vld4_dup_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c

index 43571141f0d5c2b6189f12077385a0948bf268bb..a436cf0929136c284e66600d9ddeeaa6ab90a550 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
@@ -15,5 +15,5 @@ void test_vld4_dupu16 (void)
    out_uint16x4x4_t = vld4_dup_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c

index aefcac61be91b7301f97cca29c037acb7f9f46d8..6836abd69e0d9ec6ed09bae8b7dc471c24ab7002 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
@@ -15,5 +15,5 @@ void test_vld4_dupu32 (void)
    out_uint32x2x4_t = vld4_dup_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c

index 59f6e04c370dd9f07dd1a5bace28778b50c079cd..244eb61886fa5d659daf3f60bd4b6f6150651578 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
@@ -15,5 +15,5 @@ void test_vld4_dupu64 (void)
    out_uint64x1x4_t = vld4_dup_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c

index 7ace026a5cc2f481f6dff4fae3e9a3afe264bf44..33c7875175565ccf01b1af7e109ff66b9d7417d1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
@@ -15,5 +15,5 @@ void test_vld4_dupu8 (void)
    out_uint8x8x4_t = vld4_dup_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c

index 1fd272630705837fdc97466f7a37793e0215f606..0fc0ab5fcb9a8d4a73f184a078837ec45d04dda6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
@@ -16,5 +16,5 @@ void test_vld4_lanef32 (void)
    out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c

index 0f021aff0fc9af92b096015838572d505cfb7367..b7407ade183b6d10ce60fd1bb43902060d6bad05 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
@@ -16,5 +16,5 @@ void test_vld4_lanep16 (void)
    out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c

index a6d6a9f6a09374135f8a9b1197afeed0c05302ea..7e084106d672e2fdf019377165fc22c9333a1031 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
@@ -16,5 +16,5 @@ void test_vld4_lanep8 (void)
    out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c

index 3b29ec8c9a899306484ebbbdacbcc7d46113f715..0dc653c5ffbf22f6a912b0c8bbe4d53622182881 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
@@ -16,5 +16,5 @@ void test_vld4_lanes16 (void)
    out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c

index 86383dbdb073d2cbde9109d54c94979345403dac..a3bdaf2349d0c1c8a965cb96eb74fcee9d9bd5e9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
@@ -16,5 +16,5 @@ void test_vld4_lanes32 (void)
    out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c

index 80586c3d669033f60218112a1f74c284f3e4375f..8555220fab52695dc002bb6f15ed9577154e6711 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
@@ -16,5 +16,5 @@ void test_vld4_lanes8 (void)
    out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c

index 4425b5e19f10acfc09871274043f6b5c42966cc3..4a417f744be7c8a31870405951ad7c8861a7066e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
@@ -16,5 +16,5 @@ void test_vld4_laneu16 (void)
    out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c

index 09d27220e358295389c9b0c45d1e6690e6f80661..c1e013a9f2ef7d6010f5f65114bc2e714105c7d9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
@@ -16,5 +16,5 @@ void test_vld4_laneu32 (void)
    out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c

index 5c1a76f28327bb76ee9bfb73548b1850c7e49f4d..31dcf8ae6d686d08ec4ed6baf89f2765c2fc0b05 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
@@ -16,5 +16,5 @@ void test_vld4_laneu8 (void)
    out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c

index e3315813eedd283360117d8debbacbdeaf5e7ec6..aa755c0f2325595ee53300e309bc731e84e79df0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
@@ -15,5 +15,5 @@ void test_vld4f32 (void)
    out_float32x2x4_t = vld4_f32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c

index d5b415eca5e6e1f9de55d6309fe4a4ae308656bb..e0300e8b48a838e220b1c9425add65dace30cc9c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
@@ -15,5 +15,5 @@ void test_vld4p16 (void)
    out_poly16x4x4_t = vld4_p16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c

index 785e86a2fac88017fc71a751f20d5fe25e28eb8e..7fbb29cf3dcf585cb3915242fdf2051e23164405 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
@@ -15,5 +15,5 @@ void test_vld4p8 (void)
    out_poly8x8x4_t = vld4_p8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c

index b725e5d9c5061e85f65fa5e329ad654ae2316bd7..a5ef07b202ffa865b6efb8a06fbd6a9011506763 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
@@ -15,5 +15,5 @@ void test_vld4s16 (void)
    out_int16x4x4_t = vld4_s16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c

index eaa7b36d58aa430baf66b0670b6251d28cef9d4d..08b929475e234d4f28a2229c494f9f915699978c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
@@ -15,5 +15,5 @@ void test_vld4s32 (void)
    out_int32x2x4_t = vld4_s32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c

index 3bc5e43f11dd415a2096067606a939c23fc6ab48..99ea5480374b6b3e903a0b9b26caf794701874e9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
@@ -15,5 +15,5 @@ void test_vld4s64 (void)
    out_int64x1x4_t = vld4_s64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c

index 94789dca9c6f268fe1e2879a499e1e5c96816bbc..c9574671ee88cb46d12eb8003c93f93236c3c4fe 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
@@ -15,5 +15,5 @@ void test_vld4s8 (void)
    out_int8x8x4_t = vld4_s8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c

index bd4cef90b57afe72493044d579d9750cb78cf307..4dea8af02be518e4ad48a98c0938d05bcc2f7aa3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
@@ -15,5 +15,5 @@ void test_vld4u16 (void)
    out_uint16x4x4_t = vld4_u16 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c

index d98f0d4768b1562a3ae2e7143f4ca83f8d773050..aee2225897d347403abe5d8fbf5301fda4e9800d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
@@ -15,5 +15,5 @@ void test_vld4u32 (void)
    out_uint32x2x4_t = vld4_u32 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c

index 55418309a8562c6ed3f8d4d02837450331f5cb30..2e8575406f475a9e2e7f6ae14e755d38e8fdad0b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
@@ -15,5 +15,5 @@ void test_vld4u64 (void)
    out_uint64x1x4_t = vld4_u64 (0);
  }
  
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c

index af2e686e06719e2271b5e8d530409e4e6d156fcd..ec1d9f9c4003e24aab33929aa5615e48b4139117 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
@@ -15,5 +15,5 @@ void test_vld4u8 (void)
    out_uint8x8x4_t = vld4_u8 (0);
  }
  
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c

index 4b09964191f9234bc9793a1515e88be72f2a114d..1f95128e644194e9a93b10d7b7c5ddce9bac368a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanef32 (void)
    vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c

index d619d5fc94da76a90d96d4b12a63825d79322cea..90e7ccc1bf079caca71054ed68050bb36c3824aa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanep16 (void)
    vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c

index 9bc250befe6f08bff9e51173d6f033f0ee8af8c1..6abb646c41aaa32f1466a5c276dbc83609d9e4eb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanep8 (void)
    vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c

index 81281a25d100b102c1b6b976d41d3fe1bc8deb3c..ec283e228a7c3a317301fd7611f66c8273ecf095 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanes16 (void)
    vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c

index 43f769e6d744b6d04bb9f8a5bf665be66edae5a3..6e73d6e118f0472ab6183ade4d85ebd125c729f8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanes32 (void)
    vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c

index 7ea5940d4456ee6ebaceb3c2c11dd51a87c23dab..46d369c99a8dbb52312e1d182e33fa147c13ee51 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanes64 (void)
    vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c

index f34faa5e2d680f98a5edcd3b7f36ec362cd70ab4..d7b3a1c12a31f6e3ca563aaee80a50cbc7a9c21a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
@@ -16,5 +16,5 @@ void test_vst1Q_lanes8 (void)
    vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c

index e90dccf96dbe194c693e4c41dbabef2943abd288..27958f6d07ece452d0ddbdba3b0d43bd2acd4cd1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vst1Q_laneu16 (void)
    vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c

index 42816c0431e85c5493473c457dcbb0b817005d8d..b4aa760e481a941c312e7a3b9a81353dfb7257b7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vst1Q_laneu32 (void)
    vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c

index 8b87921a169525e7ecda9ff6a9fbedfaadcb3b6a..54faaa3fec0dfdfb2d64fdc12a6a6e8e23f9bb91 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
@@ -16,5 +16,5 @@ void test_vst1Q_laneu64 (void)
    vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c

index 4eeee81bbe92fe280ff5224389c1fd571633b9ba..9b09e72c2cc8bf25a833918c720704a24da419a2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
@@ -16,5 +16,5 @@ void test_vst1Q_laneu8 (void)
    vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c

index bd25c0656ab9c1790cd99af52f7435b89b081a5d..a4b3d8a1cdff6bafd466e3bee28dd951bfdf421d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
@@ -16,5 +16,5 @@ void test_vst1Qf32 (void)
    vst1q_f32 (arg0_float32_t, arg1_float32x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c

index a055bb63a682cc1dd412d8245ccde32d8378cf5f..9b48733716b61d2d252b476aae98abdb58ccfb69 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
@@ -16,5 +16,5 @@ void test_vst1Qp16 (void)
    vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c

index fa98e7ab8a7ffaae25070cf61cc4fad868589324..f3843399e520e3ed9cfc06c0f938c860d9846f96 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
@@ -16,5 +16,5 @@ void test_vst1Qp8 (void)
    vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c

index 4265f3118c907e4b5ae176a863755912cb63f45e..e6c39cf35f856504e409c24a63ebc5bff412d5de 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
@@ -16,5 +16,5 @@ void test_vst1Qs16 (void)
    vst1q_s16 (arg0_int16_t, arg1_int16x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c

index d252f9a348c12eec66fc80a7caf1d2382ffc0d50..587dcf0ecdf4aafb91e810ba7c535b5077bf6fc2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
@@ -16,5 +16,5 @@ void test_vst1Qs32 (void)
    vst1q_s32 (arg0_int32_t, arg1_int32x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c

index 01aeebf982505dab2751c9c9461ba5f55bf4efd9..50511d1ea2f6b7b6e2bfd93f0837a001b0eb4aec 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
@@ -16,5 +16,5 @@ void test_vst1Qs64 (void)
    vst1q_s64 (arg0_int64_t, arg1_int64x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c

index 860b8c5f21be08688af52d050ee5addad7529730..2de9814b070cefff585487c9b4622e01cdda9fc4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
@@ -16,5 +16,5 @@ void test_vst1Qs8 (void)
    vst1q_s8 (arg0_int8_t, arg1_int8x16_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c

index 2c3cc222dabba9e764345a28bc6be3f75577dab6..81d8cc5ef96377035211113900e8a6be43408265 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
@@ -16,5 +16,5 @@ void test_vst1Qu16 (void)
    vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c

index f67fc1abe4d01573b221b0d3812d8c2e80bca1cc..408c6b29ea197a653904c9c43b1a11b191d25b11 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
@@ -16,5 +16,5 @@ void test_vst1Qu32 (void)
    vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c

index e0a4d9841285a483379d529aadeea3228b842902..1c17e5b0c1c835cac6a4e1b1fb3d567ae4f26583 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
@@ -16,5 +16,5 @@ void test_vst1Qu64 (void)
    vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c

index ff9c66fc9d2af5b3e0de7a1d48ecf3089d7ca6c7..1605e275680f2e329434d0510dcff9cfee0df8ed 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
@@ -16,5 +16,5 @@ void test_vst1Qu8 (void)
    vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c

index 57f1106008f47eb5cad285674c812bffa7ec7fcc..7817031403027fb51b6ad57c438b49700558adad 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
@@ -16,5 +16,5 @@ void test_vst1_lanef32 (void)
    vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c

index a5fc94fe104eda281a760de839892f294e2c4d42..c6a19daf2b0c8758b98beed5bc231d2aa01a65c6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
@@ -16,5 +16,5 @@ void test_vst1_lanep16 (void)
    vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c

index 6a5ca7ea939dc2c59e66bfd6af9d3a3f73f9313a..1b5dd4f77f42bf172d140d793493403a1b5bf5f9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
@@ -16,5 +16,5 @@ void test_vst1_lanep8 (void)
    vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c

index 9e1ee3a7faebac3a038d7bbe22e722d34cacea33..4efdc5024971e014dac73cb4fdd9dab6efd5cfb7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
@@ -16,5 +16,5 @@ void test_vst1_lanes16 (void)
    vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c

index 251b8a9680816bf822c78ce07988b8f2c12f3fca..9c3c1354cb940355508f96fbbfe91c26b7a1a03c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
@@ -16,5 +16,5 @@ void test_vst1_lanes32 (void)
    vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c

index fb48c8b62cd985bc12907783840c704b547f3a67..64fed4a1006ad421efb375812ef0a3fb22f571d2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
@@ -16,5 +16,5 @@ void test_vst1_lanes64 (void)
    vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c

index bc932aed4176135620ca8311c55002917b30c4d2..59646f8a0f4c3c9c2e07c97a63a60fa28012e414 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
@@ -16,5 +16,5 @@ void test_vst1_lanes8 (void)
    vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c

index 0ba3d3838d92b13fb9f832256b138a59f7cd459f..6ae716647236a62706fbe38a0e7d99e48ec4c5b5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
@@ -16,5 +16,5 @@ void test_vst1_laneu16 (void)
    vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c

index bf953c4b2d86d2945e61e066c775d2c5d3926643..369abf7fa3535a4f819579557d7ce2ad2c06a2aa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
@@ -16,5 +16,5 @@ void test_vst1_laneu32 (void)
    vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c

index 4f486d3f190d28628c11be7f9710a21136112074..7296fee8bdd28096d061f0d20b4256a47fc1120a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
@@ -16,5 +16,5 @@ void test_vst1_laneu64 (void)
    vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c

index 144864f788dcac0c66e9a334fd3e48aede2c37dd..ba6076e1f77b00097315b1193aaf8b5f7fa7974b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
@@ -16,5 +16,5 @@ void test_vst1_laneu8 (void)
    vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c

index 3690958bcd174d058b74137c6e331f3dd27da26b..f3460f5e7c2b650861c9f096849a46b36891329f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
@@ -16,5 +16,5 @@ void test_vst1f32 (void)
    vst1_f32 (arg0_float32_t, arg1_float32x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c

index aa38de1117964cd9f915960fd66c113e7427ee8a..7504c5cf8a57899da84f4a0d955cc1edfa940ede 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
@@ -16,5 +16,5 @@ void test_vst1p16 (void)
    vst1_p16 (arg0_poly16_t, arg1_poly16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c

index bfef51d6d548ec7412ed30fe147d09a588caeec8..3059aac60e9309adcdf8162030a7b4e096cfe333 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
@@ -16,5 +16,5 @@ void test_vst1p8 (void)
    vst1_p8 (arg0_poly8_t, arg1_poly8x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c

index a5e785d3e36180101ee1f6132b1865991a939d7a..fbddb2fd79d0affb4ca8e597091e40c246fbe6b4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
@@ -16,5 +16,5 @@ void test_vst1s16 (void)
    vst1_s16 (arg0_int16_t, arg1_int16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c

index a0088ae51d43051aa5a2ff39a195e485cc68ba46..f264db0363fa5da74529192a03a4b47234039c0a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
@@ -16,5 +16,5 @@ void test_vst1s32 (void)
    vst1_s32 (arg0_int32_t, arg1_int32x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c

index fc304f92a70fa4bf3b399db6064859604f18c0f6..64de48bb0132931682aedf47e461e04330111f72 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
@@ -16,5 +16,5 @@ void test_vst1s64 (void)
    vst1_s64 (arg0_int64_t, arg1_int64x1_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c

index b63274004a6b1fc63d13bac214a40d99ef06eda9..7916448d88b0876664a8204df76aad81839738e3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
@@ -16,5 +16,5 @@ void test_vst1s8 (void)
    vst1_s8 (arg0_int8_t, arg1_int8x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c

index 381a47e89ef6ae39bca433469cf876c008677938..797aef16f8678ef680dd41e93c593e206becc9bd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
@@ -16,5 +16,5 @@ void test_vst1u16 (void)
    vst1_u16 (arg0_uint16_t, arg1_uint16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c

index ec73ac6812383a74ec956cce97e43b6cbe3ebff2..563ea9dc39193c4404f0fe7c0372840968a132a8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
@@ -16,5 +16,5 @@ void test_vst1u32 (void)
    vst1_u32 (arg0_uint32_t, arg1_uint32x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c

index 8cd9a28d81e68783f2212f9e617bb1f8dd51ff8f..b95f5d587a14108e69c12edabbee6c25df96a44e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
@@ -16,5 +16,5 @@ void test_vst1u64 (void)
    vst1_u64 (arg0_uint64_t, arg1_uint64x1_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c

index ff557cee44dd12395e012ad2da2953deb14ef7f6..75358e769a11ba49660f24c9cef09094086365a7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
@@ -16,5 +16,5 @@ void test_vst1u8 (void)
    vst1_u8 (arg0_uint8_t, arg1_uint8x8_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c

index 2d35d1ce4daa152b2932b20c986101051291e1af..4857356321d197a9bb949fe23f974a3c26cf867a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vst2Q_lanef32 (void)
    vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c

index 8a8a84672d3ca882a44d411bb3fb7db668793681..bed15034c275346dac3adbfe9cb7650076eda6c5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vst2Q_lanep16 (void)
    vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c

index 5b01c0ce70951bc291f881c0dad2cc0a2f29f4c7..57867352f135c29539218aacc23a94229ff3c052 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vst2Q_lanes16 (void)
    vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c

index 81e125f20d11df261f3a0e3470a70b158b2b8b6d..cf0dc15dd46d1ef61ae74a9f69a4b56235328f32 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vst2Q_lanes32 (void)
    vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c

index ed4a1e610ad726498f6a89f7673c6850f3a1343c..b751e6b97af8d28336a0669bb03187b3fe41153b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vst2Q_laneu16 (void)
    vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c

index d2f39ffd1b3a48ca0878e9f1a9ec9fb34cb02e2b..b5fbe0e28148783df81ec5eb16b8a997a5913ff3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vst2Q_laneu32 (void)
    vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c

index 426a19570cb3b0dd86b34fad850791668b28f2ba..56f9adcda51dc7f86415e7419ecbf3da8fc60005 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
@@ -16,6 +16,6 @@ void test_vst2Qf32 (void)
    vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c

index aeae48c0f090ced06d613b27f732a0fe6c1015ef..1841990339ca25c8c85c6fc01d9be05a6b71e3f3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
@@ -16,6 +16,6 @@ void test_vst2Qp16 (void)
    vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c

index d18410cb505debb91fb2adc4838ace2e770199e6..2d98ec910e0b76bae866789381031e61be6d6088 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
@@ -16,6 +16,6 @@ void test_vst2Qp8 (void)
    vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c

index 9fad004eb53b0c7943f2f87597d38b26559c5cca..39395f6d021c53a9c97d75dd5ec738d1d9619bf4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
@@ -16,6 +16,6 @@ void test_vst2Qs16 (void)
    vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c

index 6cd063d757e36f81d8610a1f108d492617d38f37..1768d478682ccc0276f1f552f6f663d2868ec112 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
@@ -16,6 +16,6 @@ void test_vst2Qs32 (void)
    vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c

index c09dea2e31b6de7ea5c984cd57e93544b2a6a61b..423cb8c8f72fef80c1b1ca53ea43f18c2ecccd64 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
@@ -16,6 +16,6 @@ void test_vst2Qs8 (void)
    vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c

index 6a5cf5635f6134e81548be51111b7ae92625b8f7..a25958a720a8bc080cfb31265ac3974e3125d6d5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
@@ -16,6 +16,6 @@ void test_vst2Qu16 (void)
    vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c

index 4b4d27fb4b2b88d882a3eb25f6aefc8078384a81..47722b3521d1a68f0c581aa54c8ca377422a9bfd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
@@ -16,6 +16,6 @@ void test_vst2Qu32 (void)
    vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c

index e1b32e84eff6ccf2e05e6b0139cf882b37f81284..b794780266a48806870df9fd2f8a9de9716905f5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
@@ -16,6 +16,6 @@ void test_vst2Qu8 (void)
    vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c

index 5aa11e799e84e73741f423678af932cc0967c2cf..e7752920e796fa292409cf50d6f440b6594df470 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
@@ -16,5 +16,5 @@ void test_vst2_lanef32 (void)
    vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c

index 27fe65056d264ca5684966f538fbd8a7c4cf5028..be9913b3960699771101a1dbe8c49baca29188a9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
@@ -16,5 +16,5 @@ void test_vst2_lanep16 (void)
    vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c

index b6ee44109cb132164a3bcf118a5c12b2f2286fb8..0a95e268d67b8b707001d21fd54bd2fd06a8856e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
@@ -16,5 +16,5 @@ void test_vst2_lanep8 (void)
    vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c

index 00303752f472d9daa294e97f39dde749b0c8671c..728593ccbaeaa37e64fcadb133b48f5dde8ccb7d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
@@ -16,5 +16,5 @@ void test_vst2_lanes16 (void)
    vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c

index 6f2cf260d1e7db79b818e33df96d7dca57dc3242..32d49b58c6c3e713ecdcc0b43cfafda746605e39 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
@@ -16,5 +16,5 @@ void test_vst2_lanes32 (void)
    vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c

index 5e32ccb61c77c0dd75c083f0b7cfd2f41fbad469..9e67eb323432fd4f3fa2cf86b7f338419600c08b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
@@ -16,5 +16,5 @@ void test_vst2_lanes8 (void)
    vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c

index bfdf447b15b19ecaa5bececcc5b71cc705084a99..d56f2096151e31f412e4dea555ec005137d2fe03 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
@@ -16,5 +16,5 @@ void test_vst2_laneu16 (void)
    vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c

index 22580003f626b734a15768a3c5f5bc6e7b79944b..053704cea0778d2ae2266dc96ebb1eda9de35d68 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
@@ -16,5 +16,5 @@ void test_vst2_laneu32 (void)
    vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c

index b10c78abf1c6b6f370ab5ef6fbba632538fda74f..a35360088b09b192491fc3aec123ca6f99354efe 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
@@ -16,5 +16,5 @@ void test_vst2_laneu8 (void)
    vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c

index 45c084f082cefb52e804b3fa0376946ae25e9250..b43c4135ba1c8fbebaf5b751c5cf5815ee60a0c2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
@@ -16,5 +16,5 @@ void test_vst2f32 (void)
    vst2_f32 (arg0_float32_t, arg1_float32x2x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c

index 9f29ddf26de432c3eb1f792fea9a24cb7df8fb1e..1d112ff658bc28fa0d08e9a5760eb43f6b64bae5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
@@ -16,5 +16,5 @@ void test_vst2p16 (void)
    vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c

index 92ae9c40a85dd36cfa05fed33a95f04079ba6367..59c4d62e349f89db002c3f20c8269a46e6df0e8c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
@@ -16,5 +16,5 @@ void test_vst2p8 (void)
    vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c

index 30b6a2b04337fc2b50048dc6feb1c826c8e23ba2..eb6cb59a40ddb2572581170d0aa2d7d7289ab31f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
@@ -16,5 +16,5 @@ void test_vst2s16 (void)
    vst2_s16 (arg0_int16_t, arg1_int16x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c

index 208e2586b8ab3683954e7bf9a87b95291b9fed61..a17b58dc4744386e80fd2b34c05e9eeb1d63b33e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
@@ -16,5 +16,5 @@ void test_vst2s32 (void)
    vst2_s32 (arg0_int32_t, arg1_int32x2x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c

index 4cc53b467979ac7649c21773a340f5b9ac8b16bc..668ae50a434a47fabfe4cd5881624cdfdea11c22 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
@@ -16,5 +16,5 @@ void test_vst2s64 (void)
    vst2_s64 (arg0_int64_t, arg1_int64x1x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c

index e56b49341fa7a79f08d58293770b66a529fd9997..343414e34d28e19af6f09fee9626288f4dafa7ed 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
@@ -16,5 +16,5 @@ void test_vst2s8 (void)
    vst2_s8 (arg0_int8_t, arg1_int8x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c

index 7d8d83ec53735ced7f4a24ee3e3f71ac3846c42e..903279d0dc49f2a759868f350fedfbf5ffc7e459 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
@@ -16,5 +16,5 @@ void test_vst2u16 (void)
    vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c

index dafab12ca571a7ff42371ee9c8df31b5fbc33572..1396ed119efee992f586eee9ed78a6ab6e9b5c3a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
@@ -16,5 +16,5 @@ void test_vst2u32 (void)
    vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c

index 64f433b18e25fea7e087bb35a96e3fc875f20449..006e31f257eba7aa63ef5e2e8289442a8ec0d083 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
@@ -16,5 +16,5 @@ void test_vst2u64 (void)
    vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c

index 1b1b6e266024a817c1b540e672433fcd15c3a8f5..55cd34779934fa74dd95a76de93eae6757183eac 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
@@ -16,5 +16,5 @@ void test_vst2u8 (void)
    vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t);
  }
  
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c

index 334bc26adc8b26cf9426e724f5e84e538214876e..8e4f0dca93d721609176bfe1be6a9675c079d9c4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vst3Q_lanef32 (void)
    vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c

index c108bac1db47e14a4a3eb913f9c7169ed1628b6a..f8fcb977f537406de104d1f06f25149f3ba2ca98 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vst3Q_lanep16 (void)
    vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c

index c32ffb6fca1713fe28f30fefda3350b35592e421..3fde1a3afc7370f20f0993875967a7d9fff1fb2e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vst3Q_lanes16 (void)
    vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c

index faafb9333c89f3b037d96707835e0375198105e9..1eb428922e4bd5604b3c9b022bef3e5451ef7e01 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vst3Q_lanes32 (void)
    vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c

index f3fc1c60d9b529ffeeebbe0e217958749002097e..ca98dded6fa3ac970523229d16cf7745991ac1a1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vst3Q_laneu16 (void)
    vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c

index e11f4a395e6826812626db578759dcef8d10296a..a2a59d7a7893e13eefbb1f5d47eef5ee1d51fba2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vst3Q_laneu32 (void)
    vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c

index 61dc577d7b4ef79445e3d546aa4873fa2bec2a38..b4b480fb78d7442476537ff6219b78b23119b8e5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
@@ -16,6 +16,6 @@ void test_vst3Qf32 (void)
    vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c

index 87d76964272f2716502b174415685087d27354b5..aa34886f97b2e173d2973ace3e42855c4a270b69 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
@@ -16,6 +16,6 @@ void test_vst3Qp16 (void)
    vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c

index 0681c9a47f2742ef9b5cbcd2e3e2678cb0af40c1..b13fcd7e28823cb364ec9506b021fded3cc44f83 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
@@ -16,6 +16,6 @@ void test_vst3Qp8 (void)
    vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c

index e9b864075191be119bbcc84f983496960f7d893c..6cac405f05d7d3c400bc7116361a72ccade9e988 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
@@ -16,6 +16,6 @@ void test_vst3Qs16 (void)
    vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c

index 2ec2ef0b7c4d94a50812cb84e8d7126c7ff91ce3..3c8437094fd808659f78400e116f275714915d84 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
@@ -16,6 +16,6 @@ void test_vst3Qs32 (void)
    vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c

index d6362573a8b6c47a5880c4f3bb28e68b45bdc521..fee56af424459b0c7d3be6011051d68c380931e5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
@@ -16,6 +16,6 @@ void test_vst3Qs8 (void)
    vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c

index f10c69f4d6a72b4bdae067882da8c1770c9683af..af3910b7f440ab188b2c19f9d0a16039a1150b85 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
@@ -16,6 +16,6 @@ void test_vst3Qu16 (void)
    vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c

index 08820891e6e6027391407aff72e3e18a14787546..8828885aff8bbdff03676cafed60a2c589c68d4c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
@@ -16,6 +16,6 @@ void test_vst3Qu32 (void)
    vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c

index 919a1cbbb0095b61b290d68dc0ebdc094878b56e..c273fe6dc987334aafd17a8b62ae29bb23c49762 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
@@ -16,6 +16,6 @@ void test_vst3Qu8 (void)
    vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c

index d527c7803a6ba8774e84617c39135686c4c55094..de654e907885941fdcb8bf22c7954657b2b04ca6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
@@ -16,5 +16,5 @@ void test_vst3_lanef32 (void)
    vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c

index 491f8eb399b8789a497d8739ecd4afd4eb9037a7..de733ff676a5ea403696c7dd7f42d36656ef92c0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
@@ -16,5 +16,5 @@ void test_vst3_lanep16 (void)
    vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c

index 0546c3ab57cd83ec47d7d441c8c1320023b55c4f..a9a26447f94ac34c6b8920d3508112660fe856e6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
@@ -16,5 +16,5 @@ void test_vst3_lanep8 (void)
    vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c

index 4825789195653f5d5e447698f40581bcd22144b1..a98b40714d854639c7496220d0ead517c0b5e815 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
@@ -16,5 +16,5 @@ void test_vst3_lanes16 (void)
    vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c

index 51da4144d7883c82c51b799ebe36d9ccc7d24447..5b2450c6756230ad2ce690fbf4b3cc6c2eac3ede 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
@@ -16,5 +16,5 @@ void test_vst3_lanes32 (void)
    vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c

index b75f2109ba1e690ba0a9955c702b07a4b8098c68..8cd04f7164918659ab75972b33f4f82107ad0f58 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
@@ -16,5 +16,5 @@ void test_vst3_lanes8 (void)
    vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c

index 9686054976baae2c4cce1d20666c018f2568325b..692058d9110db9448a2203d6757f2dd26dc3c6d1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
@@ -16,5 +16,5 @@ void test_vst3_laneu16 (void)
    vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c

index da1af40523b0a0663a3f937c6e270b28c0c94e2f..32a5193a351dfd2b08561b6eb764e17bd54415c9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
@@ -16,5 +16,5 @@ void test_vst3_laneu32 (void)
    vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c

index 47eccc0dffa2a87e65eaeb8df6f592beda564df7..952ffcbec033c7f757cdd5b94fbe2d8daac21eec 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
@@ -16,5 +16,5 @@ void test_vst3_laneu8 (void)
    vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c

index ac871786a9c104dc0845fe149805667b6409df34..e80b8e9162206aee14d7258aa8f15c87e8a3c0b5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
@@ -16,5 +16,5 @@ void test_vst3f32 (void)
    vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c

index 08a861b9f4185769c46d1f87001d88ed94417a68..1d7831264ef07a1b757ec74c489238b800884627 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
@@ -16,5 +16,5 @@ void test_vst3p16 (void)
    vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c

index d357fdfadf892fa2d0f003b029843d253cd0a170..ca8c5ec439d9cc11c56d7fb2488b762af013ad13 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
@@ -16,5 +16,5 @@ void test_vst3p8 (void)
    vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c

index 4fc940e691aec57f1793ac27d85aa4fe83cde7f9..5c1bcf9dedd97b87d8f93ee8569641bfd0615825 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
@@ -16,5 +16,5 @@ void test_vst3s16 (void)
    vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c

index 82b4cfa6a71d8cc89e450bf2dbffd099582d8cfb..3f5a3aad149a95571953ae8c4ba207c15c6bf5cf 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
@@ -16,5 +16,5 @@ void test_vst3s32 (void)
    vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c

index a8e86d2368fd3ab8373c4a0d6a4a16c008453e9e..8c6a851db947105bdcf995e4543c6cc6e8c4d81b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
@@ -16,5 +16,5 @@ void test_vst3s64 (void)
    vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c

index 563534db21cfeec5549a9ab40be9fdc3c17bbb0f..8853fbaf510605dfa25748ead198364505004c24 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
@@ -16,5 +16,5 @@ void test_vst3s8 (void)
    vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c

index 679d7b833eb1b0319a90fe52fc01ae7b865930e9..e17c6c8d68ab2b280c7710375e67d03f79ac9b8e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
@@ -16,5 +16,5 @@ void test_vst3u16 (void)
    vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c

index 8705c5eb640d8fa2a79947029ffc18e23d0dcdc6..3b7d8ce20b9867f9f5b31982b92a04f5eef7835b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
@@ -16,5 +16,5 @@ void test_vst3u32 (void)
    vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c

index 4b15e68b3242b405d3e6d5c0840bbaa48c4096f9..08d9c7a084181a382c04cfe8ff5c5c3aa90c6550 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
@@ -16,5 +16,5 @@ void test_vst3u64 (void)
    vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c

index 0e31b3b3ab187c577d0f5601aac43904045f51a8..78944cba0842e11f9aa870cb131fedb06370bf55 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
@@ -16,5 +16,5 @@ void test_vst3u8 (void)
    vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
  }
  
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c

index cb2de05bb4b1231512f845ef0515018ceeb55264..adbb4d5699290adbb3864fefb5214f379a14ada6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
@@ -16,5 +16,5 @@ void test_vst4Q_lanef32 (void)
    vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c

index 3d0f81d0c7d29331615427cddf143e70ab210d36..587477c87fda27421576a140d1fcf4128b01df82 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
@@ -16,5 +16,5 @@ void test_vst4Q_lanep16 (void)
    vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c

index 6e174a0c9d6949e060bddf3cd5d8d787f9e6f676..3febdf7d864842c8d71e09b99a9f3fdfaf93c056 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
@@ -16,5 +16,5 @@ void test_vst4Q_lanes16 (void)
    vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c

index 323626c9252e3aea7e93f66384693df2da604023..71406af83b8a23ab0f2137286a2bd101a3abe382 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
@@ -16,5 +16,5 @@ void test_vst4Q_lanes32 (void)
    vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c

index 5a396ac3e2ec0acdf0a4ca3299c8ae926d5e9c29..1229c86a3f15f7428dbb11792891e933508c0fd6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
@@ -16,5 +16,5 @@ void test_vst4Q_laneu16 (void)
    vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c

index 4c3dd6a85d24f06c08804470ca6b78018cf96f38..5e0683f30edb101f21e41266aae40ad7a2832221 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
@@ -16,5 +16,5 @@ void test_vst4Q_laneu32 (void)
    vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c

index 4da79bff128a2cb8be3e680a3eece3fb7d8fc761..2ecb6b173ad243692eabe170bdef6bd3749d2624 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
@@ -16,6 +16,6 @@ void test_vst4Qf32 (void)
    vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c

index 4892d6df4ea09a49ba6e5f60a39f15b3b856c54b..a9b9b7ca95d5ed2841e8289e35fac93f13048191 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
@@ -16,6 +16,6 @@ void test_vst4Qp16 (void)
    vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c

index 3d51e9713735577794f1fa58cc2480c4f86df891..17142c1a066bd16799f31590bd36feaeeb91a8fc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
@@ -16,6 +16,6 @@ void test_vst4Qp8 (void)
    vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c

index 9fccc6a6226528db09f5bbf6929e68a296e58516..8511619fe3cde8df837377f2d34079ee15967d3c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
@@ -16,6 +16,6 @@ void test_vst4Qs16 (void)
    vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c

index faa1db202a59a868b6e5296f2c526195c039ec01..f65894eabe51e8a559d4e151e6bfca2876c5083f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
@@ -16,6 +16,6 @@ void test_vst4Qs32 (void)
    vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c

index c68fc821dc98206d6ffe93719e104da6782bd8bf..a74d58b5f1066bbca0d6aa3fcf8c8e006e6e5995 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
@@ -16,6 +16,6 @@ void test_vst4Qs8 (void)
    vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c

index 98f9b094d32a8415adc6f75b1bd9a54f3d00dd82..b124c7cc99ad9e0391ede27facaec14621cc3142 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
@@ -16,6 +16,6 @@ void test_vst4Qu16 (void)
    vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c

index c9bfd05f2357c16742f2490b604bd17ff043d3d0..fa7d2130db89c20800342f5787e6a842e3b3b9d3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
@@ -16,6 +16,6 @@ void test_vst4Qu32 (void)
    vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c

index 8b86161fa84108d67ba296850df58e69ddc428fc..d853b12bd19f81b9c1e519f971940e5ba3f4696c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
@@ -16,6 +16,6 @@ void test_vst4Qu8 (void)
    vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c

index 4bdde6ea5fe5aac71f7083922c7dfa303db1721b..acef9f0a310d33557fc19c3d96f2c2c05b2f5488 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
@@ -16,5 +16,5 @@ void test_vst4_lanef32 (void)
    vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c

index c9889b382b0fe739a7d5b0e0984804cda560739a..64e4713ff09df674c9bb70d80a0fbb6e2d9fad75 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
@@ -16,5 +16,5 @@ void test_vst4_lanep16 (void)
    vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c

index 3d8ef6e4f02c80eeecaa0db7d84ed173480f9afd..1ac58df28fc163b4d3bd986f2c03d3318f4abc5e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
@@ -16,5 +16,5 @@ void test_vst4_lanep8 (void)
    vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c

index 255b4b9b7995607b0833b1834e38358c27eaeba6..e7e1e2aeadc143df97acfbedff75a713a36fcfff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
@@ -16,5 +16,5 @@ void test_vst4_lanes16 (void)
    vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c

index fc5217381a6e5a90298e8a2d07fd26511970a281..2c99611a868506e3f649a22465afd9a511c7b9a4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
@@ -16,5 +16,5 @@ void test_vst4_lanes32 (void)
    vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c

index e9dec5d88c2f29511afc7a3aeb573cc66888d7c3..7eebc1644e3433ab6b2c4a978b5c43ec7df3768d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
@@ -16,5 +16,5 @@ void test_vst4_lanes8 (void)
    vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c

index ee513a6409eaae6b6544a92d2cf205685f0f7672..decc7caf228befbdd66a18771a9d8be2a6eb780c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
@@ -16,5 +16,5 @@ void test_vst4_laneu16 (void)
    vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c

index 516d04c8840f42dd22180e52e86f1f13d81b9cd8..4cfeddbbbbe0594c3b2955f8ed0c746fa6c97353 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
@@ -16,5 +16,5 @@ void test_vst4_laneu32 (void)
    vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c

index 531c2b97494755a03f1fa8f0cfc1db84779eb78c..217ced27a961ad08c880c7cd308783ff12af4e48 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
@@ -16,5 +16,5 @@ void test_vst4_laneu8 (void)
    vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c

index e3268f9b8eeb65b723f525da28e8446fa0ba3fa4..931b8ed157154fd66701e88e6d4e09d5743a7d74 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
@@ -16,5 +16,5 @@ void test_vst4f32 (void)
    vst4_f32 (arg0_float32_t, arg1_float32x2x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c

index 67f32f29699ae2e77c8cbba0044ce5b491c7a0ed..ea58c44fd3febee0c533542163e682d6733a4570 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
@@ -16,5 +16,5 @@ void test_vst4p16 (void)
    vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c

index 2ed766a8db36bc811d62be369411c864e9789212..95e5ccdf1345cc9466317d2d476937aa51f15b01 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
@@ -16,5 +16,5 @@ void test_vst4p8 (void)
    vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c

index 94794662dd6f7875aa403e486c47609ff5501822..7811d74c138e3ea9903782e79df9a16fcc04fc59 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
@@ -16,5 +16,5 @@ void test_vst4s16 (void)
    vst4_s16 (arg0_int16_t, arg1_int16x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c

index 8d22a04061729d10b440b345d9d68d6a1a6c3da0..f93ea4097e5f5d86cbe60bb6f1860ba480f7c165 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
@@ -16,5 +16,5 @@ void test_vst4s32 (void)
    vst4_s32 (arg0_int32_t, arg1_int32x2x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c

index c9dffec77ef902c617c69fa99f2fc657d72592b3..796762a3e894032e6976a0edb1424e48fff91990 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
@@ -16,5 +16,5 @@ void test_vst4s64 (void)
    vst4_s64 (arg0_int64_t, arg1_int64x1x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c

index 0dbdfc0476f73e323c9ef0b5869225fd344b0441..877e2c4077efd718c7209818493f14048b9f4ee0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
@@ -16,5 +16,5 @@ void test_vst4s8 (void)
    vst4_s8 (arg0_int8_t, arg1_int8x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c

index 4eddaf6d64345983d6ad46d350fb4a4fc4824a83..5de43f591abbad35f8527f98279e9392b53ce32e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
@@ -16,5 +16,5 @@ void test_vst4u16 (void)
    vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c

index 06a5d33cbab73140b4b336c25a57384e568c1162..1ae9e5e60064b129c7f3af3d6cfcfadc4f042a99 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
@@ -16,5 +16,5 @@ void test_vst4u32 (void)
    vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c

index 063a046afccd23f2327f8b7de48c708d4f96b2cb..2453d6bd51222d0f721fd5ead007851983b39dbb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
@@ -16,5 +16,5 @@ void test_vst4u64 (void)
    vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t);
  }
  
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c

index d4da67b9294453ccdd153d43f9251a4915f72e16..380acc647f3853eeeed8496696e0b3e8bf96f58b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
@@ -16,5 +16,5 @@ void test_vst4u8 (void)
    vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t);
  }
  
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  /* { dg-final { cleanup-saved-temps } } */
author	Richard Sandiford <richard.sandiford@linaro.org>
	Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)
committer	Richard Sandiford <rsandifo@gcc.gnu.org>
	Tue, 12 Apr 2011 12:19:38 +0000 (12:19 +0000)