ARM: Decode the VMRS instruction.

diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index a5196064196cd61048c4eb38afd45ad3c494583f..7079631c7954564b31ecefa78057187c00932966 100644 (file)
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -255,9 +255,29 @@ def format ShortFpTransfer() {{
                 // A8-648
                 return new WarnUnimplemented("vmov", machInst);
             } else if (a == 7) {
-                // A8-658
-                // B6-27
-                return new WarnUnimplemented("vmrs", machInst);
+                const IntRegIndex rt =
+                    (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
+                uint32_t specReg = bits(machInst, 19, 16);
+                switch (specReg) {
+                  case 0:
+                    specReg = MISCREG_FPSID;
+                    break;
+                  case 1:
+                    specReg = MISCREG_FPSCR;
+                    break;
+                  case 6:
+                    specReg = MISCREG_MVFR1;
+                    break;
+                  case 7:
+                    specReg = MISCREG_MVFR0;
+                    break;
+                  case 8:
+                    specReg = MISCREG_FPEXC;
+                    break;
+                  default:
+                    return new Unknown(machInst);
+                }
+                return new Vmrs(machInst, rt, (IntRegIndex)specReg);
             }
         } else {
             // A8-646