+2016-11-19 Jeff Law <law@redhat.com>
+
+ PR target/25111
+ * config/m68k/m68k.md (bsetdreg): New pattern.
+ (bchgdreg, bclrdreg): Likewise.
+
2016-11-19 Kaz Kojima <kkojima@gcc.gnu.org>
PR target/78426
}
[(set_attr "type" "bitrw")])
+(define_insn "*bsetdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (ior:SI (ashift:SI (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bset %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
+(define_insn "*bchgdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (xor:SI (ashift:SI (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bchg %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
+(define_insn "*bclrdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (and:SI (rotate:SI (const_int -2)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bclr %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
;; clear bit, bit number is int
(define_insn "bclrmemqi"
[(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m")
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-times "bset" 1 } } */
+/* { dg-final { scan-assembler-times "bchg" 1 } } */
+/* { dg-final { scan-assembler-times "bclr" 1 } } */
+
+int bar (void);
+
+int
+foo1 (int b)
+{
+ int a = bar ();
+ return ( a | (1 << (b & 31)));
+}
+
+int
+foo2 (int b)
+{
+ int a = bar ();
+ return ( a ^ (1 << (b & 31)));
+}
+
+
+int
+foo3 (int b)
+{
+ int a = bar ();
+ return ( a & ~(1 << (b & 31)));
+}
+
+