i965: Fix off-by-ones in handling the last members of register classes.
authorEric Anholt <eric@anholt.net>
Fri, 1 Oct 2010 23:36:17 +0000 (16:36 -0700)
committerEric Anholt <eric@anholt.net>
Sat, 2 Oct 2010 00:19:04 +0000 (17:19 -0700)
Luckily, one of them would result in failing out register allocation
when the other bugs were encountered.  Applies to
glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined, which still
fails register allocation, but now legitimately.

src/mesa/drivers/dri/i965/brw_fs.cpp

index ba6c048f38ff290054a0e3c6233ea3b418510a03..ddf96ca22dd19bf7aa4ef77dcb7d109f6179ad8f 100644 (file)
@@ -2326,15 +2326,15 @@ fs_visitor::assign_regs()
        * that alias base regs, or the base regs themselves for classes[0].
        */
       for (int c = 0; c <= i; c++) {
-        for (int i_r = 0; i_r < class_reg_count[i] - 1; i_r++) {
+        for (int i_r = 0; i_r < class_reg_count[i]; i_r++) {
            for (int c_r = MAX2(0, i_r - (class_sizes[c] - 1));
-                c_r <= MIN2(class_reg_count[c] - 1, i_r + class_sizes[i] - 1);
+                c_r < MIN2(class_reg_count[c], i_r + class_sizes[i]);
                 c_r++) {
 
               if (0) {
                  printf("%d/%d conflicts %d/%d\n",
-                        class_sizes[i], i_r,
-                        class_sizes[c], c_r);
+                        class_sizes[i], this->first_non_payload_grf + i_r,
+                        class_sizes[c], this->first_non_payload_grf + c_r);
               }
 
               ra_add_reg_conflict(regs,
@@ -2413,7 +2413,7 @@ fs_visitor::assign_regs()
 
       for (int c = 0; c < class_count; c++) {
         if (reg >= class_base_reg[c] &&
-            reg < class_base_reg[c] + class_reg_count[c] - 1) {
+            reg < class_base_reg[c] + class_reg_count[c]) {
            hw_reg = reg - class_base_reg[c];
            break;
         }