radeon/llvm: use correct intrinsic for CEIL
authorVadim Girlin <vadimgirlin@gmail.com>
Tue, 15 May 2012 14:48:06 +0000 (18:48 +0400)
committerVadim Girlin <vadimgirlin@gmail.com>
Tue, 15 May 2012 14:48:06 +0000 (18:48 +0400)
Should be round_posinf instead of round_neginf.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
src/gallium/drivers/radeon/R600Instructions.td
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

index 9b59171de436adfee68b84159eb9023837acc121..e145b9c8e942b9bd7f1c01a3e104c88545a8f29d 100644 (file)
@@ -312,8 +312,8 @@ def TRUNC : R600_1OP <
 
 def CEIL : R600_1OP <
   0x12, "CEIL",
-  [(set R600_Reg32:$dst, (int_AMDIL_round_neginf R600_Reg32:$src))]> {
-  let AMDILOp = AMDILInst.ROUND_NEGINF_f32;
+  [(set R600_Reg32:$dst, (int_AMDIL_round_posinf R600_Reg32:$src))]> {
+  let AMDILOp = AMDILInst.ROUND_POSINF_f32;
 }
 
 def RNDNE : R600_1OP <
index 6e6fc3d12cd177bf51a08efff4e10d9a9134fd3d..0689b6a552ada79a6772eb0acbf5fdf6af8e6f11 100644 (file)
@@ -968,7 +968,7 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
        bld_base->op_actions[TGSI_OPCODE_TXQ].fetch_args = tex_fetch_args;
        bld_base->op_actions[TGSI_OPCODE_TXQ].intr_name = "llvm.AMDGPU.txq";
        bld_base->op_actions[TGSI_OPCODE_CEIL].emit = lp_build_tgsi_intrinsic;
-       bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.AMDIL.round.neginf.";
+       bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.AMDIL.round.posinf.";