radv/gfx10: make sure to wait for idle before clearing GDS
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 11 Sep 2019 07:19:21 +0000 (09:19 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Mon, 16 Sep 2019 10:08:22 +0000 (12:08 +0200)
Otherwise the next streamout operation will overwrite GDS. This
can be improved by tracking if there is a streamout operation in
flight. Currently the driver unconditionally flushes but that
doesn't matter much as NGG streamout is disabled by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_cmd_buffer.c

index f0fdad68a94c3767e7c792544fa2fe60912327d0..7e3dd7de5347f1b147dd3246f5028269c6ec9f59 100644 (file)
@@ -5943,6 +5943,14 @@ gfx10_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer,
        assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10);
        assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
 
+       /* Sync because the next streamout operation will overwrite GDS and we
+        * have to make sure it's idle.
+        * TODO: Improve by tracking if there is a streamout operation in
+        * flight.
+        */
+       cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
+       si_emit_cache_flush(cmd_buffer);
+
        for_each_bit(i, so->enabled_mask) {
                int32_t counter_buffer_idx = i - firstCounterBuffer;
                if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)