check that virtual addresses are sign-extended

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 489aeeee028a16a2bb8d8259ebe11e066217ccc5..aa62b902571e868745493fda9ba28f5757c6d052 100644 (file)
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -60,7 +60,11 @@ pte_t mmu_t::walk(reg_t addr)
 {
   pte_t pte = 0;
 
-  if(!vm_enabled)
+  // the address must be a canonical sign-extended VA_BITS-bit number
+  int shift = 8*sizeof(reg_t) - VA_BITS;
+  if (((sreg_t)addr << shift >> shift) != addr)
+    ;
+  else if(!vm_enabled)
   {
     if(addr < memsz)
       pte = PTE_E | PTE_PERM | ((addr >> PGSHIFT) << PTE_PPN_SHIFT);

diff --git a/riscv/mmu.h b/riscv/mmu.h
index 0c61a7798d6de859eb3de6b43535bfda890972b3..f6ca972a8cea38b71d59601d1850a208b9f5b65b 100644 (file)
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -15,7 +15,9 @@ const reg_t LEVELS = sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2;
 const reg_t PGSHIFT = 13;
 const reg_t PGSIZE = 1 << PGSHIFT;
 const reg_t PTIDXBITS = PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2);
+const reg_t VPN_BITS = PTIDXBITS * LEVELS;
 const reg_t PPN_BITS = 8*sizeof(reg_t) - PGSHIFT;
+const reg_t VA_BITS = VPN_BITS + PGSHIFT;
 
 // page table entry (PTE) fields
 #define PTE_T    0x001 // Entry is a page Table descriptor