Do not perform width-checks for DSP48E1 which is much more complicated

diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index c6120695a9094a820560901d61aeb3b839eec20d..f0537670fff003d8d9a13d68b6b30fbdb91acefc 100644 (file)
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -278,17 +278,6 @@ endmatch
 code sigC sigP
        if (postAdd) {
                sigC = port(postAdd, postAddAB == \A ? \B : \A);
-
-               // TODO for DSP48E1, which will have sign extended inputs/outputs
-               //int natural_mul_width = GetSize(port(dsp, \A)) + GetSize(port(dsp, \B));
-               //int actual_mul_width = GetSize(sigP);
-               //int actual_acc_width = GetSize(sigC);
-
-               //if ((actual_acc_width > actual_mul_width) && (natural_mul_width > actual_mul_width))
-               //      reject;
-               //if ((actual_acc_width != actual_mul_width) && (param(dsp, \A_SIGNED).as_bool() != param(postAdd, \A_SIGNED).as_bool()))
-               //      reject;
-
                sigP = port(postAdd, \Y);
        }
 endcode