Add RDIMM side-B inversion support
authorDavid Shah <dave@ds0.me>
Tue, 28 Apr 2020 14:14:27 +0000 (15:14 +0100)
committerDavid Shah <dave@ds0.me>
Wed, 29 Apr 2020 11:28:53 +0000 (12:28 +0100)
Signed-off-by: David Shah <dave@ds0.me>
litex/soc/software/bios/sdram.c

index 8d8ddfefeb79a7256d3c6c7aa8c22079286c784b..94df63168260db03509ecd6c7ce510152a047397 100644 (file)
@@ -269,6 +269,13 @@ void sdrwlon(void)
        sdram_dfii_pi0_address_write(DDRX_MR1 | (1 << 7));
        sdram_dfii_pi0_baddress_write(1);
        command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+       sdram_dfii_pi0_address_write((DDRX_MR1 | (1 << 7)) ^ 0x2BF8) ;
+       sdram_dfii_pi0_baddress_write(1 ^ 0xF);
+       command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
+
        ddrphy_wlevel_en_write(1);
 }
 
@@ -277,6 +284,13 @@ void sdrwloff(void)
        sdram_dfii_pi0_address_write(DDRX_MR1);
        sdram_dfii_pi0_baddress_write(1);
        command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+       sdram_dfii_pi0_address_write(DDRX_MR1 ^ 0x2BF8);
+       sdram_dfii_pi0_baddress_write(1 ^ 0xF);
+       command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
+
        ddrphy_wlevel_en_write(0);
 }
 
@@ -1158,6 +1172,12 @@ void sdrmrwr(char reg, int value) {
        sdram_dfii_pi0_address_write(value);
        sdram_dfii_pi0_baddress_write(reg);
        command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+       sdram_dfii_pi0_address_write(value ^ 0x2BF8);
+       sdram_dfii_pi0_baddress_write(reg ^ 0xF);
+       command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
 }
 
 static void sdrmpron(char mpr)