; (TF|DF|SF|TD|DD|SD) instructions
-; load and test instructions turn SNaN into QNaN what is not
+; FIXME: load and test instructions turn SNaN into QNaN what is not
; acceptable if the target will be used afterwards. On the other hand
; they are quite convenient for implementing comparisons with 0.0. So
-; try to enable them via splitter if the value isn't needed anymore.
+; try to enable them via splitter/peephole if the value isn't needed anymore.
+; See testcases: load-and-test-fp-1.c and load-and-test-fp-2.c
; ltxbr, ltdbr, ltebr, ltxtr, ltdtr
(define_insn "*cmp<mode>_ccs_0"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-(define_split
- [(set (match_operand 0 "cc_reg_operand")
- (compare (match_operand:FP 1 "register_operand")
- (match_operand:FP 2 "const0_operand")))]
- "TARGET_HARD_FLOAT && REG_P (operands[1]) && dead_or_set_p (insn, operands[1])"
- [(parallel
- [(set (match_dup 0) (match_dup 3))
- (clobber (match_dup 1))])]
- {
- /* s390_match_ccmode requires the compare to have the same CC mode
- as the CC destination register. */
- operands[3] = gen_rtx_COMPARE (GET_MODE (operands[0]),
- operands[1], operands[2]);
- })
-
-
; VX: TFmode in FPR pairs: use cxbr instead of wfcxb
; cxtr, cdtr, cxbr, cdbr, cebr, cdb, ceb, wfcsb, wfcdb
(define_insn "*cmp<mode>_ccs"