compat.fhdl.specials: TSTriple is not an elaboratable.

diff --git a/nmigen/compat/fhdl/specials.py b/nmigen/compat/fhdl/specials.py
index 4a517e7b64d45851645917df3bcb0f2c09b1b51b..64f8db349c6ca7608d1a41399cb8870386efc547 100644 (file)
--- a/nmigen/compat/fhdl/specials.py
+++ b/nmigen/compat/fhdl/specials.py
@@ -12,7 +12,7 @@ from .module import Module as CompatModule
 __all__ = ["TSTriple", "Instance", "Memory", "READ_FIRST", "WRITE_FIRST", "NO_CHANGE"]
 
 
-class TSTriple(Elaboratable):
+class TSTriple:
     def __init__(self, bits_sign=None, min=None, max=None, reset_o=0, reset_oe=0, reset_i=0,
                  name=None):
         self.o  = Signal(bits_sign, min=min, max=max, reset=reset_o,
@@ -25,9 +25,6 @@ class TSTriple(Elaboratable):
     def __len__(self):
         return len(self.o)
 
-    def elaborate(self, platform):
-        return Fragment()
-
     def get_tristate(self, io):
         return Tristate(io, self.o, self.oe, self.i)