* mips-opc.c (sync*): Flag these instructions with INSN_SYNC.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 58ac5d76aa1ee6654caffedc8774ce40c25977c7..89ecb76b3e0571c4124267754906e427777e797b 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -5,6 +5,10 @@ Wed Dec  9 14:57:23 1998  Doug Evans  <devans@canuck.cygnus.com>
        * dvp-opc.c (vu_lower_opcodes): Update mtir entry.
        (extract_ffstreg): Fix calculation of reg part of returned value.
 
+       Thu Nov 19 16:38:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+       * mips-opc.c (sync*): Flag these instructions with INSN_SYNC.
+
        Wed Jul 29 09:41:19 1998  Frank Ch. Eigler  <fche@cygnus.com>
 
        * dvp-opc.c (vu_lower_opcodes): Allow ISW, ISWR, MFIR instructions

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 4225f86510bc3a01d9279b5cbccefbc69a147c86..caf3d098d3709725a0e2f561d14148cadd7f3dc2 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -1176,9 +1176,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000,        RD_t|RD_b,      I2      }, /* same */
 {"invalidate", "t,A(b)",0,    (int) M_SWR_AB,  INSN_MACRO,     I2      }, /* as swr */
 {"swxc1",   "S,t(b)",   0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b,     I4      },
-{"sync",    "",                0x0000000f, 0xffffffff, 0,              I2|T3   },
-{"sync.p",  "",                0x0000040f, 0xffffffff, 0,              I2      },
-{"sync.l",  "",                0x0000000f, 0xffffffff, 0,              I2      },
+{"sync",    "",                0x0000000f, 0xffffffff, INSN_SYNC,      I2|G1   },
+{"sync.p",  "",                0x0000040f, 0xffffffff, INSN_SYNC,      I2      },
+{"sync.l",  "",                0x0000000f, 0xffffffff, INSN_SYNC,      I2      },
 {"syscall", "",                0x0000000c, 0xffffffff, TRAP,   I1              },
 {"syscall", "B",       0x0000000c, 0xfc00003f, TRAP,   I1              },
 {"teqi",    "s,j",     0x040c0000, 0xfc1f0000, RD_s|TRAP,      I2      },