f->shaderBufferInt64Atomics = LLVM_VERSION_MAJOR >= 9 || pdevice->use_aco;
f->shaderSharedInt64Atomics = LLVM_VERSION_MAJOR >= 9 || pdevice->use_aco;
f->shaderFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_aco;
- f->shaderInt8 = !pdevice->use_aco || pdevice->rad_info.chip_class >= GFX8;
+ f->shaderInt8 = true;
f->descriptorIndexing = true;
f->shaderInputAttachmentArrayDynamicIndexing = true;
Extension('VK_KHR_shader_clock', 1, True),
Extension('VK_KHR_shader_draw_parameters', 1, True),
Extension('VK_KHR_shader_float_controls', 1, True),
- Extension('VK_KHR_shader_float16_int8', 1, '!device->use_aco || device->rad_info.chip_class >= GFX8'),
+ Extension('VK_KHR_shader_float16_int8', 1, True),
Extension('VK_KHR_shader_non_semantic_info', 1, True),
Extension('VK_KHR_shader_subgroup_extended_types', 1, True),
Extension('VK_KHR_spirv_1_4', 1, True),
}
}
}
- bool int8_enable = !device->physical_device->use_aco ||
- device->physical_device->rad_info.chip_class >= GFX8;
const struct spirv_to_nir_options spirv_options = {
.lower_ubo_ssbo_access_to_offsets = true,
.caps = {
.image_ms_array = true,
.image_read_without_format = true,
.image_write_without_format = true,
- .int8 = int8_enable,
+ .int8 = true,
.int16 = true,
.int64 = true,
.int64_atomics = true,