req->xc);
if (write) { write_acv++; } else { read_acv++; }
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
// Check for "superpage" mapping: when SP<1> is set, and
((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK),
req->xc);
if (write) { write_acv++; } else { read_acv++; }
- return Dtb_Acv_Fault;
+ return DTB_Acv_Fault;
}
req->paddr = req->vaddr & PA_IMPL_MASK;
(pte->fonw ? MM_STAT_FONW_MASK : 0),
req->xc);
write_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
if (pte->fonw) {
fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK,
req->xc);
write_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
} else {
if (!(pte->xre & MODE2MASK(mode))) {
(pte->fonr ? MM_STAT_FONR_MASK : 0),
req->xc);
read_acv++;
- return Dtb_Acv_Fault;
+ return DTB_Acv_Fault;
}
if (pte->fonr) {
fault(req->vaddr, MM_STAT_FONR_MASK, req->xc);
read_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
}
}
0x0201, /* Ndtb_Miss_Fault */
0x0281, /* Pdtb_Miss_Fault */
0x0301, /* Alignment_Fault */
- 0x0381, /* Dtb_Fault_Fault */
- 0x0381, /* Dtb_Acv_Fault */
- 0x0181, /* Itb_Miss_Fault */
- 0x0181, /* Itb_Fault_Fault */
- 0x0081, /* Itb_Acv_Fault */
+ 0x0381, /* DTB_Fault_Fault */
+ 0x0381, /* DTB_Acv_Fault */
+ 0x0181, /* ITB_Miss_Fault */
+ 0x0181, /* ITB_Fault_Fault */
+ 0x0081, /* ITB_Acv_Fault */
0x0481, /* Unimplemented_Opcode_Fault */
0x0581, /* Fen_Fault */
0x2001, /* Pal_Fault */
Ndtb_Miss_Fault, // DTB miss
Pdtb_Miss_Fault, // nested DTB miss
Alignment_Fault, // unaligned access
- Dtb_Fault_Fault, // DTB page fault
- Dtb_Acv_Fault, // DTB access violation
- Itb_Miss_Fault, // ITB miss
- Itb_Fault_Fault, // ITB page fault
- Itb_Acv_Fault, // ITB access violation
+ DTB_Fault_Fault, // DTB page fault
+ DTB_Acv_Fault, // DTB access violation
+ ITB_Miss_Fault, // ITB miss
+ ITB_Fault_Fault, // ITB page fault
+ ITB_Acv_Fault, // ITB access violation
Unimplemented_Opcode_Fault, // invalid/unimplemented instruction
Fen_Fault, // FP not-enabled fault
Pal_Fault, // call_pal S/W interrupt
// constructor
#ifdef FULL_SYSTEM
ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
- AlphaItb *_itb, AlphaDtb *_dtb,
+ AlphaITB *_itb, AlphaDTB *_dtb,
FunctionalMemory *_mem)
: _status(ExecContext::Unallocated),
kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num),
#ifdef FULL_SYSTEM
FunctionalMemory *mem;
- AlphaItb *itb;
- AlphaDtb *dtb;
+ AlphaITB *itb;
+ AlphaDTB *dtb;
System *system;
// the following two fields are redundant, since we can always
// constructor: initialize context from given process structure
#ifdef FULL_SYSTEM
ExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
- AlphaItb *_itb, AlphaDtb *_dtb, FunctionalMemory *_dem);
+ AlphaITB *_itb, AlphaDTB *_dtb, FunctionalMemory *_dem);
#else
ExecContext(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid);
ExecContext(BaseCPU *_cpu, int _thread_num, FunctionalMemory *_mem,
#ifdef FULL_SYSTEM
class Processor;
class Kernel;
-class AlphaItb;
-class AlphaDtb;
+class AlphaITB;
+class AlphaDTB;
class PhysicalMemory;
class RemoteGDB;
System *_system,
Counter max_insts_any_thread, Counter max_insts_all_threads,
Counter max_loads_any_thread, Counter max_loads_all_threads,
- AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem,
+ AlphaITB *itb, AlphaDTB *dtb, FunctionalMemory *mem,
MemInterface *icache_interface, MemInterface *dcache_interface,
bool _def_reg, Tick freq);