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Change literal vars from int to unsigned
author
Eddie Hung
<eddieh@ece.ubc.ca>
Fri, 8 Feb 2019 16:09:30 +0000
(08:09 -0800)
committer
Eddie Hung
<eddieh@ece.ubc.ca>
Fri, 8 Feb 2019 16:09:30 +0000
(08:09 -0800)
frontends/aiger/aigerparse.cc
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diff --git
a/frontends/aiger/aigerparse.cc
b/frontends/aiger/aigerparse.cc
index abff6d8d9aeac2604565d617fea2b3531c4c30ca..0414d3db3272d6b8cfdd174d4238c536686ceb67 100644
(file)
--- a/
frontends/aiger/aigerparse.cc
+++ b/
frontends/aiger/aigerparse.cc
@@
-100,7
+100,7
@@
static void parse_aiger_ascii(RTLIL::Design *design, std::istream &f, std::strin
return wire;
};
-
int
l1, l2, l3;
+
unsigned
l1, l2, l3;
// Parse inputs
std::vector<RTLIL::Wire*> inputs;