(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index c352ae603bff8a00d705667199df654f64dbc795..b8e6fcaec542c3099109f038dff7e0b2dd5b8a76 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -45,7 +45,7 @@ simply neither read nor written.  This includes when `scalar identity behaviour`
 
 An interesting side-effect of this decision is that the OE flag is now free for other uses when SV Prefixing is used.
 
-# Additional instructions: v3.0B/v3.1B overrides
+# Additional instructions: v3.0B/v3.1B alternatives
 
 SV is primarily designed for use as an efficient hybrid 3D GPU / VPU / CPU ISA.
 
@@ -55,6 +55,8 @@ This leaves several Major Opcodes free for use by SV to fit alternative instruct
 
 Note however that svp64 is stand-alone and is in no way critically dependent on the existence or provision of 3D GPU or VPU instructions. These should be considered extensions, and their discussion and specification is out of scope for this document.
 
+Note, again: this is *only* under svp64 prefixing.  Standard v3.0B / v3.1B is *not* altered by svp64.
+
 # Register Naming and size
 
 SV Registers are simply the INT, FP and CR register files extended