pan/mdg: Respect type/mask in mir_lower_special_reads

Fixes RA issues with the lowered moves, as well as enabling more
aggressive scheduling (hence the slight shdaer-db win).

total instructions in shared programs: 48539 -> 48491 (-0.10%)
instructions in affected programs: 4400 -> 4352 (-1.09%)
helped: 13
HURT: 0
helped stats (abs) min: 1 max: 8 x̄: 3.69 x̃: 3
helped stats (rel) min: 0.50% max: 1.89% x̄: 1.06% x̃: 1.10%
95% mean confidence interval for instructions value: -5.05 -2.33
95% mean confidence interval for instructions %-change: -1.29% -0.84%
Instructions are helped.

total bundles in shared programs: 23447 -> 23392 (-0.23%)
bundles in affected programs: 2224 -> 2169 (-2.47%)
helped: 21
HURT: 1
helped stats (abs) min: 1 max: 8 x̄: 2.67 x̃: 2
helped stats (rel) min: 0.89% max: 20.00% x̄: 9.04% x̃: 2.40%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.20% max: 1.20% x̄: 1.20% x̃: 1.20%
95% mean confidence interval for bundles value: -3.51 -1.49
95% mean confidence interval for bundles %-change: -12.52% -4.63%
Bundles are helped.

total quadwords in shared programs: 39651 -> 39586 (-0.16%)
quadwords in affected programs: 5557 -> 5492 (-1.17%)
helped: 38
HURT: 1
helped stats (abs) min: 1 max: 2 x̄: 1.74 x̃: 2
helped stats (rel) min: 0.61% max: 14.29% x̄: 3.92% x̃: 1.20%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.69% max: 0.69% x̄: 0.69% x̃: 0.69%
95% mean confidence interval for quadwords value: -1.87 -1.47
95% mean confidence interval for quadwords %-change: -5.55% -2.05%
Quadwords are helped.

total registers in shared programs: 3336 -> 3337 (0.03%)
registers in affected programs: 21 -> 22 (4.76%)
helped: 1
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 11.11% max: 11.11% x̄: 11.11% x̃: 11.11%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 16.67% max: 16.67% x̄: 16.67% x̃: 16.67%

total threads in shared programs: 2592 -> 2593 (0.04%)
threads in affected programs: 1 -> 2 (100.00%)
helped: 1
HURT: 0

total spills in shared programs: 17 -> 17 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 35 -> 35 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5781>

diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c
index 1bc7bbf4fe1af0713ca3e8680884f0ecaad8f30d..84f83aa443c5a51e4ebf86c7576d1eeee89ffbc8 100644 (file)
--- a/src/panfrost/midgard/midgard_ra.c
+++ b/src/panfrost/midgard/midgard_ra.c
@@ -266,9 +266,6 @@ mir_lower_special_reads(compiler_context *ctx)
 
                         unsigned idx = spill_idx++;
 
-                        midgard_instruction m = hazard_write ?
-                                v_mov(idx, i) : v_mov(i, idx);
-
                         /* Insert move before each read/write, depending on the
                          * hazard we're trying to account for */
 
@@ -279,19 +276,23 @@ mir_lower_special_reads(compiler_context *ctx)
                                 if (hazard_write) {
                                         if (pre_use->dest != i)
                                                 continue;
-                                } else {
-                                        if (!mir_has_arg(pre_use, i))
-                                                continue;
-                                }
 
-                                if (hazard_write) {
+                                        midgard_instruction m = v_mov(idx, i);
+                                        m.dest_type = pre_use->dest_type;
+                                        m.src_types[1] = m.dest_type;
+                                        m.mask = pre_use->mask;
+
                                         midgard_instruction *use = mir_next_op(pre_use);
                                         assert(use);
                                         mir_insert_instruction_before(ctx, use, m);
                                         mir_rewrite_index_dst_single(pre_use, i, idx);
                                 } else {
+                                        if (!mir_has_arg(pre_use, i))
+                                                continue;
+
                                         idx = spill_idx++;
-                                        m = v_mov(i, idx);
+
+                                        midgard_instruction m = v_mov(i, idx);
                                         m.mask = mir_from_bytemask(mir_round_bytemask_up(
                                                                 mir_bytemask_of_read_components(pre_use, i), 32), 32);
                                         mir_insert_instruction_before(ctx, pre_use, m);