Revert "i965: VS use SPF mode on sandybridge for now"
authorZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 10 Nov 2010 13:17:45 +0000 (08:17 -0500)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 10 Nov 2010 13:17:45 +0000 (08:17 -0500)
This reverts commit 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c.

Remove VS SPF mode, conditional instruction works for VS now.

src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/gen6_vs_state.c

index aa8048c9fc3bb74e141c7ebb4e5f5f9650b40710..b8b29a721441c175abdbb53c54b443c07a346e67 100644 (file)
@@ -1685,10 +1685,6 @@ void brw_vs_emit(struct brw_vs_compile *c )
       printf("\n");
    }
 
-   /* FIXME Need to fix conditional instruction to remove this */
-   if (intel->gen >= 6)
-       p->single_program_flow = GL_TRUE;
-
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_access_mode(p, BRW_ALIGN_16);
    if_depth_in_loop[loop_depth] = 0;
index d8da216d15f18c0e6e0228fe522390003fb36387..e94d0c0ddbb6e2d02afc8a18c0162b1a940e10dc 100644 (file)
@@ -135,7 +135,7 @@ upload_vs_state(struct brw_context *brw)
    BEGIN_BATCH(6);
    OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
    OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-   OUT_BATCH(GEN6_VS_SPF_MODE | (0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
+   OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
             (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
    OUT_BATCH(0); /* scratch space base offset */
    OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |