Make ARMv8-M GAS tests pass on non ELF targets
authorThomas Preud'homme <thomas.preudhomme@arm.com>
Tue, 17 May 2016 15:35:12 +0000 (16:35 +0100)
committerThomas Preud'homme <thomas.preudhomme@arm.com>
Tue, 17 May 2016 15:38:11 +0000 (16:38 +0100)
2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
disassembling and stop skipping targets.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
instruction for targets that have stronger alignment requirement.
* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m.s: Add label.
* testsuite/gas/arm/archv8m-cmse.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.

16 files changed:
gas/ChangeLog
gas/testsuite/gas/arm/archv8m-base.d
gas/testsuite/gas/arm/archv8m-cmse-base.d
gas/testsuite/gas/arm/archv8m-cmse-main-1.d
gas/testsuite/gas/arm/archv8m-cmse-main-2.d
gas/testsuite/gas/arm/archv8m-cmse-main.s
gas/testsuite/gas/arm/archv8m-cmse-msr-base.d
gas/testsuite/gas/arm/archv8m-cmse-msr-main.d
gas/testsuite/gas/arm/archv8m-cmse-msr.s
gas/testsuite/gas/arm/archv8m-cmse.s
gas/testsuite/gas/arm/archv8m-main-dsp-1.d
gas/testsuite/gas/arm/archv8m-main-dsp-2.d
gas/testsuite/gas/arm/archv8m-main-dsp-3.d
gas/testsuite/gas/arm/archv8m-main-dsp-4.d
gas/testsuite/gas/arm/archv8m-main.d
gas/testsuite/gas/arm/archv8m.s

index eea0f8bfa2af8354de5774a49aaf983ac3c1037a..745c13c492f33e4b58fbf46cd3fca5b980314b17 100644 (file)
@@ -1,3 +1,23 @@
+2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
+       disassembling and stop skipping targets.
+       * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+       * testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
+       instruction for targets that have stronger alignment requirement.
+       * testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+       * testsuite/gas/arm/archv8m-main.d: Likewise.
+       * testsuite/gas/arm/archv8m.s: Add label.
+       * testsuite/gas/arm/archv8m-cmse.s: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
+
 2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
        * config/tc-m32r.c (mach_table): Make static and const.
index 60df240008be1f4d429b23de1e3d82b5ee9b7fc9..6a2ee87f3b6eb90754c91c78788276b2bfd92880 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARM V8-M baseline instructions
 #source: archv8m.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-pe *-wince-* *-*-coff
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index ba6ff3ac9b917b86b75f6f9dcd965c4b6255ac41..23576376a23786daeb739e08fd31b4c4a1f2c11c 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Baseline Security Extensions instructions
 #source: archv8m-cmse.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index f4937df31868b39e9f501945e1556bec14e4aead..edb398222796c8cf3b8f0b57aab66a5d70ee7b8a 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline Security Extensions instructions (1)
 #source: archv8m-cmse.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index 0aa67e44220470a9d3d1833cf6f9ae874270fbce..bf37ecc6e4f7452377c8eca22710a09a3053e2a8 100644 (file)
@@ -1,11 +1,11 @@
 #name: ARMv8-M Mainline Security Extensions instructions (2)
 #source: archv8m-cmse-main.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
 0+.* <[^>]*> ec31 0a00         vlldm   r1
 0+.* <[^>]*> ec22 0a00         vlstm   r2
+#...
index 069cad6b22a200d3b2077d1be275480b776269e2..871414fd19fe6fcd95284e2f7089275c696b716a 100644 (file)
@@ -1,5 +1,6 @@
 .thumb
 .syntax unified
 
+T:
 vlldm r1
 vlstm r2
index ded24ef19dbaab9befa6f45534af3be1bfb03b66..4bbb82d79b2c1f6277d93dd49270250748fb61f6 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Baseline Security Extensions MSR/MRS instructions
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index df531509bd4f694a743df4bd5575452ae194dbda..30a3361c37458c8894fa76bd2dd5b8425664668b 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline Security Extensions MSR/MRS instructions
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index 4a617610139630ac66bdaa95d005fa27c6e098fb..897be1a9256195de85a7b8869e942a298faf92ec 100644 (file)
@@ -1,3 +1,4 @@
+T:
 msr   MSP, r0
 msr   MSP_S, r0
 msr   MSP_NS, r0
index 520550c8709d9cc8b73756fabc6147cb3009505e..cac82c5fcbf1f42f81c6738eb2c79b259f432fdd 100644 (file)
@@ -1,6 +1,7 @@
 .thumb
 .syntax unified
 
+T:
 sg
 blxns r4
 blxns r9
index 17714b8ac3cd03d4492120b5408d1f5e4cc1ab21..c8f9d7b81bf1af3949afffa7d4d3df7f3065f4bc 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (base)
 #source: archv8m.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index 7730a032bcc39cfe92668bb324b3dad80f00a748..59b860ae3cb5e0ad50b965c756802458a2b73467 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 1)
 #source: archv8m-cmse.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index fdd9c780252f4a4d8449124170355979374c67d3..5ac1ddfdf795d11061364f93bcc1bc3ab19bbf77 100644 (file)
@@ -1,11 +1,11 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 2)
 #source: archv8m-cmse-main.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
 0+.* <[^>]*> ec31 0a00         vlldm   r1
 0+.* <[^>]*> ec22 0a00         vlstm   r2
+#...
index 1bb19ea8f35b3fd1d098d2ee9eb182054f73a107..248f75e00af6d1a7a43f80bcfc6e4f80556ae1d4 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 3)
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index 055721a03391cb51c7553d6f657e7e6113edcb11..a0c40e99c89cef9aaef41c252bc37806d776f278 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARM V8-M mainline instructions
 #source: archv8m.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-pe *-wince-* *-*-coff
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index 8aca8bae50c9b8bc9f1e717acf35debe9902984b..5f8aafed48746e19056a33405104a9768ed9feab 100644 (file)
@@ -1,6 +1,7 @@
 .thumb
 .syntax unified
 
+T:
 blx r4
 blx r9
 bx  r4