v850eq simulator tests.

diff --git a/sim/testsuite/v850eq-elf/Makefile.in b/sim/testsuite/v850eq-elf/Makefile.in
new file mode 100644 (file)
index 0000000..a5ae36a
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/Makefile.in
@@ -0,0 +1,60 @@
+AS_FOR_TARGET=v850-elf-as
+LD_FOR_TARGET=v850-elf-ld
+RUN_FOR_TARGET=~/build/test-sim/v850-elf/sim/v850/run
+srcdir=.
+
+TESTS= \
+       hello.hi \
+       exit47.ko \
+       \
+       t-ldsr.ok
+
+check: sanity $(TESTS)
+sanity:
+       @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET)
+       @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET)
+       @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET)
+
+# Rules for running the tests
+
+.SUFFIXES: .ok .run .hi .ko
+.run.ok:
+       rm -f tmp-$* $*.hi
+       ulimit -t 5 ; \
+       $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
+       mv tmp-$* $*.ok
+.run.hi:
+       rm -f tmp-$* $*.hi diff-$*
+       ulimit -t 5 ; \
+       $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
+       echo 'Hello World!' | diff - tmp-$* > diff-$*
+       cat tmp-$* diff-$* > $*.hi
+.run.ko:
+       rm -f tmp-$* $*.ko
+       set +e ; \
+       ulimit -t 5 ; \
+       $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* ; \
+       if [ $$? -eq 47 ] ; then \
+         exit 0 ; \
+       else \
+         exit 1 ; \
+       fi
+       mv tmp-$* $*.ko
+
+
+# Rules for building the test
+# Preference is for obtaining the executable (.run) from a prebuilt image
+
+.SUFFIXES: .uue .s .S .run
+.uue.run:
+       head $* | grep $*.run > /dev/null
+       uudecode $*.uue
+.run.u:
+       uuencode < $*.run $*.run > $*.u
+.o.run:
+       $(LD_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -o $*.run $*.o
+.s.o:
+       $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) $(srcdir)/$*.s -o $*.o
+.S.o:
+       $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) $(srcdir)/$*.S -o $*.o
+# NNN

diff --git a/sim/testsuite/v850eq-elf/configure.in b/sim/testsuite/v850eq-elf/configure.in
new file mode 100644 (file)
index 0000000..002493b
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/configure.in
@@ -0,0 +1,15 @@
+dnl Process this file with autoconf to produce a configure script.
+sinclude(../common/aclocal.m4)
+AC_PREREQ(2.5)dnl
+AC_INIT(Makefile.in)
+
+SIM_AC_COMMON
+
+SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
+SIM_AC_OPTION_HOSTENDIAN
+SIM_AC_OPTION_WARNINGS
+
+AC_CHECK_FUNCS(time chmod utime fork execve execv chown)
+AC_CHECK_HEADERS(unistd.h stdlib.h string.h strings.h utime.h time.h)
+
+SIM_AC_OUTPUT

diff --git a/sim/testsuite/v850eq-elf/exit47.s b/sim/testsuite/v850eq-elf/exit47.s
new file mode 100644 (file)
index 0000000..93e4664
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/exit47.s
@@ -0,0 +1,4 @@
+.include "t-macros.i"
+
+       start
+       exit47

diff --git a/sim/testsuite/v850eq-elf/hello.s b/sim/testsuite/v850eq-elf/hello.s
new file mode 100644 (file)
index 0000000..c7f84d6
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/hello.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+       start
+       
+       mov 4, r6
+       mov 1, r7                   # FID
+       load32 r8 hello             # string
+       mov ehello - hello, r9      # size
+       trap 31
+
+       exit0
+
+       .data
+hello: .ascii "Hello World!\n"
+ehello:

diff --git a/sim/testsuite/v850eq-elf/t-ldsr.s b/sim/testsuite/v850eq-elf/t-ldsr.s
new file mode 100644 (file)
index 0000000..41b7720
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/t-ldsr.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+       start
+
+       # check that a ldsr/stsr instruction clears reserved bits
+       mov -1, r1
+       ldsr r1, psw
+       stsr psw, r2
+       sub r1, r2
+       be bad
+       exit0
+bad:   
+       exit47

diff --git a/sim/testsuite/v850eq-elf/t-macros.i b/sim/testsuite/v850eq-elf/t-macros.i
new file mode 100644 (file)
index 0000000..c8882ee
--- /dev/null
+++ b/sim/testsuite/v850eq-elf/t-macros.i
@@ -0,0 +1,25 @@
+       .macro start
+       .text
+       .globl _start
+_start:
+       .endm
+
+       .macro exit47
+       mov 1, r6
+       addi 47, r0, r7
+       trap 31
+       .endm
+
+       .macro exit0
+       mov 1, r6
+       mov 0, r7
+       trap 31
+       .endm
+
+       .macro load32 reg val
+       jr 1f
+       .align 2
+1:     jarl 2f, \reg 
+       .long \val
+2:     ld.w 0[\reg], \reg
+       .endm