{ o(ARB_robust_buffer_access_behavior), PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR },
{ o(ARB_sample_shading), PIPE_CAP_SAMPLE_SHADING },
{ o(ARB_seamless_cube_map), PIPE_CAP_SEAMLESS_CUBE_MAP },
+ { o(ARB_shader_clock), PIPE_CAP_TGSI_CLOCK },
{ o(ARB_shader_draw_parameters), PIPE_CAP_DRAW_PARAMETERS },
{ o(ARB_shader_group_vote), PIPE_CAP_TGSI_VOTE },
{ o(ARB_shader_stencil_export), PIPE_CAP_SHADER_STENCIL_EXPORT },
visit_image_intrinsic(ir);
return;
+ case ir_intrinsic_shader_clock: {
+ ir->return_deref->accept(this);
+
+ st_dst_reg dst = st_dst_reg(this->result);
+ dst.writemask = TGSI_WRITEMASK_XY;
+
+ emit_asm(ir, TGSI_OPCODE_CLOCK, dst);
+ return;
+ }
+
case ir_intrinsic_invalid:
case ir_intrinsic_generic_load:
case ir_intrinsic_generic_store:
case ir_intrinsic_generic_atomic_max:
case ir_intrinsic_generic_atomic_exchange:
case ir_intrinsic_generic_atomic_comp_swap:
- case ir_intrinsic_shader_clock:
unreachable("Invalid intrinsic");
}
}