}
}
-/* Computes the address to a texture at a particular slice */
-
-static mali_ptr
-panfrost_get_texture_address(
- struct panfrost_resource *rsrc,
- unsigned level, unsigned face)
-{
- unsigned level_offset = rsrc->bo->slices[level].offset;
- unsigned face_offset = face * rsrc->bo->cubemap_stride;
-
- /* Lower-bit is set when sampling from colour AFBC */
- bool is_afbc = rsrc->bo->layout == PAN_AFBC;
- bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL;
- unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0;
-
- return rsrc->bo->gpu + level_offset + face_offset + afbc_bit;
-
-}
-
static mali_ptr
panfrost_upload_tex(
struct panfrost_context *ctx,
struct panfrost_resource *rsrc = pan_resource(surf->texture);
unsigned level = surf->u.tex.level;
- assert(surf->u.tex.first_layer == 0);
-
+ unsigned first_layer = surf->u.tex.first_layer;
int stride = rsrc->bo->slices[level].stride;
- unsigned offset = rsrc->bo->slices[level].offset;
+
+ mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer);
rt->format = panfrost_mfbd_format(surf);
if (rsrc->bo->layout == PAN_LINEAR) {
rt->format.block = MALI_MFBD_BLOCK_LINEAR;
- rt->framebuffer = rsrc->bo->gpu + offset;
+ rt->framebuffer = base;
rt->framebuffer_stride = stride / 16;
} else if (rsrc->bo->layout == PAN_TILED) {
rt->format.block = MALI_MFBD_BLOCK_TILED;
- rt->framebuffer = rsrc->bo->gpu + offset;
+ rt->framebuffer = base;
rt->framebuffer_stride = stride;
} else if (rsrc->bo->layout == PAN_AFBC) {
rt->format.block = MALI_MFBD_BLOCK_AFBC;
- mali_ptr base = rsrc->bo->gpu + offset;
unsigned header_size = rsrc->bo->slices[level].header_size;
rt->framebuffer = base + header_size;
return blit_res;
}
+/* Computes the address to a texture at a particular slice */
+
+mali_ptr
+panfrost_get_texture_address(
+ struct panfrost_resource *rsrc,
+ unsigned level, unsigned face)
+{
+ unsigned level_offset = rsrc->bo->slices[level].offset;
+ unsigned face_offset = face * rsrc->bo->cubemap_stride;
+
+ /* Lower-bit is set when sampling from colour AFBC */
+ bool is_afbc = rsrc->bo->layout == PAN_AFBC;
+ bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL;
+ unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0;
+
+ return rsrc->bo->gpu + level_offset + face_offset + afbc_bit;
+}
+
static void
panfrost_resource_set_stencil(struct pipe_resource *prsrc,
struct pipe_resource *stencil)
return (struct panfrost_gtransfer *)p;
}
+mali_ptr
+panfrost_get_texture_address(
+ struct panfrost_resource *rsrc,
+ unsigned level, unsigned face);
+
void panfrost_resource_screen_init(struct panfrost_screen *screen);
void panfrost_resource_screen_deinit(struct panfrost_screen *screen);