radeonsi: fix unaligned clear_buffer fallback

This is unreachable currently, but it will be used by unaligned 8-bit and
16-bit fills.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 418b2cf65c5ec8a62c0f4fe07cccee51b563b2cf..7b8c6d00395b66797c57e7b05b029af186acbeb6 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -176,12 +176,14 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
 
        /* Fallback for unaligned clears. */
        if (offset % 4 != 0 || size % 4 != 0) {
-               uint32_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->cs_buf,
-                                                      sctx->b.rings.gfx.cs,
-                                                      PIPE_TRANSFER_WRITE);
-               size /= 4;
-               for (unsigned i = 0; i < size; i++)
-                       *map++ = value;
+               uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->cs_buf,
+                                                     sctx->b.rings.gfx.cs,
+                                                     PIPE_TRANSFER_WRITE);
+               map += offset;
+               for (unsigned i = 0; i < size; i++) {
+                       unsigned byte_within_dword = (offset + i) % 4;
+                       *map++ = (value >> (byte_within_dword * 8)) & 0xff;
+               }
                return;
        }