r600g: don't emit color blend register on original R600.
authorDave Airlie <airlied@redhat.com>
Tue, 31 May 2011 00:52:07 +0000 (10:52 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 31 May 2011 00:52:07 +0000 (10:52 +1000)
The original R600 doesn't have these so don't emit them.

Signed-off-by: Dave Airlie <airlied@redhat.com>
src/gallium/winsys/r600/drm/r600_hw_context.c
src/gallium/winsys/r600/drm/r600_priv.h

index 1e29da2cf099cb6a2297adb9a4c72dfa6d1c761d..a3f85d229196cb9fbcc7aa70cd5381da15220a0f 100644 (file)
@@ -82,6 +82,12 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg,
                        continue;
                }
 
+               /* ignore regs not on R600 on R600 */
+               if ((reg[i].flags & REG_FLAG_NOT_R600) && ctx->radeon->family == CHIP_R600) {
+                       n = 1;
+                       continue;
+               }
+
                /* register that need relocation are in their own group */
                /* find number of consecutive registers */
                n = 0;
@@ -321,14 +327,14 @@ static const struct r600_reg r600_context_reg_list[] = {
        {R_0286DC_SPI_FOG_CNTL, 0, 0, 0},
        {R_0286E0_SPI_FOG_FUNC_SCALE, 0, 0, 0},
        {R_0286E4_SPI_FOG_FUNC_BIAS, 0, 0, 0},
-       {R_028780_CB_BLEND0_CONTROL, 0, 0, 0},
-       {R_028784_CB_BLEND1_CONTROL, 0, 0, 0},
-       {R_028788_CB_BLEND2_CONTROL, 0, 0, 0},
-       {R_02878C_CB_BLEND3_CONTROL, 0, 0, 0},
-       {R_028790_CB_BLEND4_CONTROL, 0, 0, 0},
-       {R_028794_CB_BLEND5_CONTROL, 0, 0, 0},
-       {R_028798_CB_BLEND6_CONTROL, 0, 0, 0},
-       {R_02879C_CB_BLEND7_CONTROL, 0, 0, 0},
+       {R_028780_CB_BLEND0_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_028784_CB_BLEND1_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_028788_CB_BLEND2_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_02878C_CB_BLEND3_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_028790_CB_BLEND4_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_028794_CB_BLEND5_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_028798_CB_BLEND6_CONTROL, REG_FLAG_NOT_R600, 0, 0},
+       {R_02879C_CB_BLEND7_CONTROL, REG_FLAG_NOT_R600, 0, 0},
        {R_0287A0_CB_SHADER_CONTROL, 0, 0, 0},
        {R_028800_DB_DEPTH_CONTROL, 0, 0, 0},
        {R_028804_CB_BLEND_CONTROL, 0, 0, 0},
index 78b8190d6f5e760469e1f6c8a342fad67d218c62..2e6a4375199c0f62b0f803676ab08bae4f8d835c 100644 (file)
@@ -65,6 +65,7 @@ struct radeon {
 #define REG_FLAG_NEED_BO 1
 #define REG_FLAG_DIRTY_ALWAYS 2
 #define REG_FLAG_RV6XX_SBU 4
+#define REG_FLAG_NOT_R600 8
 
 struct r600_reg {
        unsigned                        offset;