use dict for lookup of DFI to pads names

add ras.reset=1

diff --git a/gram/phy/dfi.py b/gram/phy/dfi.py
index 814ad1bfa7e16af413c95696666e73e9c5cb132b..8f76c6d9c26ac85d602d3a105be5b37d7ef84024 100644 (file)
--- a/gram/phy/dfi.py
+++ b/gram/phy/dfi.py
@@ -45,6 +45,7 @@ class Interface:
             self.phases += [p]
             # set all logic-inverted x_n signal resets to on at power-up
             p.cas.reset = 1
+            p.ras.reset = 1
             p.cs_n.reset = -1
             p.we.reset = 1
             p.act.reset = 1

diff --git a/gram/phy/ecp5ddrphy.py b/gram/phy/ecp5ddrphy.py
index c644edd4fab44200bd6cf79a92d3261840726641..ce13c99d8d76a1f242dc40c1a482fc8a3dc90f81 100644 (file)
--- a/gram/phy/ecp5ddrphy.py
+++ b/gram/phy/ecp5ddrphy.py
@@ -251,11 +251,8 @@ class ECP5DDRPHY(Peripheral, Elaboratable):
             pad = getattr(self.pads, name)
             # sigh, convention in nmigen_boards is "rst" but in
             # dfi.Interface it is "reset"
-            if name == 'rst':
-                name = 'reset_n'
-            # sigh same for cs
-            if name == 'cs':
-                name = 'cs_n'
+            dfi2pads = {'rst': 'reset_n', 'cs': 'cs_n'}
+            name = dfi2pads.get(name, name) # remap if exists
             m.d.comb += [
                 pad.o_clk.eq(ClockSignal("dramsync")),
                 pad.o_fclk.eq(ClockSignal("sync2x")),