rs6000: Improve truncifsf2
authorSegher Boessenkool <segher@kernel.crashing.org>
Mon, 16 Jul 2018 23:02:11 +0000 (01:02 +0200)
committerSegher Boessenkool <segher@gcc.gnu.org>
Mon, 16 Jul 2018 23:02:11 +0000 (01:02 +0200)
The current implementation leaves an unnecessary register move.  It is
easier to just expand things in the expander already.  This patch does
that.

* config/rs6000/rs6000.md (trunc<mode>sf2): Expand truncates of
double-double modes to SFmode directly directly.
(trunc<mode>sf2_fprs): Delete.

From-SVN: r262754

gcc/ChangeLog
gcc/config/rs6000/rs6000.md

index 598598445c0fce4b8eb8caf8f00bbfa4d23716c0..6bdf930d06f5a835a9428ad5886c7dbe0e74244b 100644 (file)
@@ -1,3 +1,9 @@
+2018-07-16  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (trunc<mode>sf2): Expand truncates of
+       double-double modes to SFmode directly directly.
+       (trunc<mode>sf2_fprs): Delete.
+
 2018-07-16  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/rs6000.c (init_float128_ibm): Use the correct names
index 44d32d9edc8d7ed52153c5ce0164db78ee2a1ea5..94a0f7d9a662a0fbf69d2f337a70325b5d930ae6 100644 (file)
 {
   if (FLOAT128_IEEE_P (<MODE>mode))
     rs6000_expand_float128_convert (operands[0], operands[1], false);
-  else if (<MODE>mode == TFmode)
-    emit_insn (gen_trunctfsf2_fprs (operands[0], operands[1]));
-  else if (<MODE>mode == IFmode)
-    emit_insn (gen_truncifsf2_fprs (operands[0], operands[1]));
   else
-    gcc_unreachable ();
+    {
+      rtx tmp = gen_reg_rtx (DFmode);
+      emit_insn (gen_trunc<mode>df2 (tmp, operands[1]));
+      emit_insn (gen_truncdfsf2 (operands[0], tmp));
+    }
   DONE;
 })
 
-(define_insn_and_split "trunc<mode>sf2_fprs"
-  [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
-       (float_truncate:SF (match_operand:IBM128 1 "gpc_reg_operand" "d")))
-   (clobber (match_scratch:DF 2 "=d"))]
-  "TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2)
-       (float_truncate:DF (match_dup 1)))
-   (set (match_dup 0)
-       (float_truncate:SF (match_dup 2)))]
-  "")
-
 (define_expand "floatsi<mode>2"
   [(parallel [(set (match_operand:FLOAT128 0 "gpc_reg_operand")
                   (float:FLOAT128 (match_operand:SI 1 "gpc_reg_operand")))