gas/
authorMaciej W. Rozycki <macro@linux-mips.org>
Mon, 28 Feb 2011 15:52:26 +0000 (15:52 +0000)
committerMaciej W. Rozycki <macro@linux-mips.org>
Mon, 28 Feb 2011 15:52:26 +0000 (15:52 +0000)
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
register to use.
(RELAX_BRANCH_UNCOND): Adjust accordingly.
(RELAX_BRANCH_LIKELY): Likewise.
(RELAX_BRANCH_LINK): Likewise.
(RELAX_BRANCH_TOOFAR): Likewise.
(RELAX_BRANCH_AT): New macro.
(append_insn): Encode the temporary register to use in standard
MIPS branch relaxation.
(relaxed_branch_length): Update according to changes to
RELAX_BRANCH_ENCODE.
(md_convert_frag): Use the encoded register as the temporary.

gas/testsuite/
* gas/mips/relax-at.d: New test for branch relaxation with .set
at.
* gas/mips/relax.s: Update to support the new test.
* gas/mips/relax.l: Update accordingly.
* gas/mips/relax.d: Update for multi-arch invocation.
* gas/mips/mips.exp: Run the new test.  Adjust to run "relax"
across all applicable architectures.

gas/ChangeLog
gas/config/tc-mips.c
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/relax-at.d [new file with mode: 0644]
gas/testsuite/gas/mips/relax.d
gas/testsuite/gas/mips/relax.l
gas/testsuite/gas/mips/relax.s

index 316abb73c7bc689d7a644c4ec7f9322b1ad00e5a..2b71f2a7ce3b692835b99c5c84612f59b39e75f4 100644 (file)
@@ -1,3 +1,18 @@
+2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
+       register to use.
+       (RELAX_BRANCH_UNCOND): Adjust accordingly.
+       (RELAX_BRANCH_LIKELY): Likewise.
+       (RELAX_BRANCH_LINK): Likewise.
+       (RELAX_BRANCH_TOOFAR): Likewise.
+       (RELAX_BRANCH_AT): New macro.
+       (append_insn): Encode the temporary register to use in standard
+       MIPS branch relaxation.
+       (relaxed_branch_length): Update according to changes to
+       RELAX_BRANCH_ENCODE.
+       (md_convert_frag): Use the encoded register as the temporary.
+
 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * config/tc-mips.c (mips_fix_adjustable): On REL targets also
index 897ed0f83616835f84b97fb96de6be6b122b64f2..9450ddd8ce79641f74b2ddb3b9eaeca5761109ad 100644 (file)
@@ -918,18 +918,20 @@ static int mips_relax_branch;
 
 
    but it's not clear that it would actually improve performance.  */
-#define RELAX_BRANCH_ENCODE(uncond, likely, link, toofar) \
-  ((relax_substateT) \
-   (0xc0000000 \
-    | ((toofar) ? 1 : 0) \
-    | ((link) ? 2 : 0) \
-    | ((likely) ? 4 : 0) \
-    | ((uncond) ? 8 : 0)))
+#define RELAX_BRANCH_ENCODE(at, uncond, likely, link, toofar)  \
+  ((relax_substateT)                                           \
+   (0xc0000000                                                 \
+    | ((at) & 0x1f)                                            \
+    | ((toofar) ? 0x20 : 0)                                    \
+    | ((link) ? 0x40 : 0)                                      \
+    | ((likely) ? 0x80 : 0)                                    \
+    | ((uncond) ? 0x100 : 0)))
 #define RELAX_BRANCH_P(i) (((i) & 0xf0000000) == 0xc0000000)
-#define RELAX_BRANCH_UNCOND(i) (((i) & 8) != 0)
-#define RELAX_BRANCH_LIKELY(i) (((i) & 4) != 0)
-#define RELAX_BRANCH_LINK(i) (((i) & 2) != 0)
-#define RELAX_BRANCH_TOOFAR(i) (((i) & 1) != 0)
+#define RELAX_BRANCH_UNCOND(i) (((i) & 0x100) != 0)
+#define RELAX_BRANCH_LIKELY(i) (((i) & 0x80) != 0)
+#define RELAX_BRANCH_LINK(i) (((i) & 0x40) != 0)
+#define RELAX_BRANCH_TOOFAR(i) (((i) & 0x20) != 0)
+#define RELAX_BRANCH_AT(i) ((i) & 0x1f)
 
 /* For mips16 code, we use an entirely different form of relaxation.
    mips16 supports two versions of most instructions which take
@@ -2940,7 +2942,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
                              : (pinfo & INSN_COND_BRANCH_LIKELY) ? 1
                              : 0)), 4,
                        RELAX_BRANCH_ENCODE
-                       (pinfo & INSN_UNCOND_BRANCH_DELAY,
+                       (AT,
+                        pinfo & INSN_UNCOND_BRANCH_DELAY,
                         pinfo & INSN_COND_BRANCH_LIKELY,
                         pinfo & INSN_WRITE_GPR_31,
                         0),
@@ -14145,7 +14148,8 @@ relaxed_branch_length (fragS *fragp, asection *sec, int update)
 
   if (fragp && update && toofar != RELAX_BRANCH_TOOFAR (fragp->fr_subtype))
     fragp->fr_subtype
-      = RELAX_BRANCH_ENCODE (RELAX_BRANCH_UNCOND (fragp->fr_subtype),
+      = RELAX_BRANCH_ENCODE (RELAX_BRANCH_AT (fragp->fr_subtype),
+                            RELAX_BRANCH_UNCOND (fragp->fr_subtype),
                             RELAX_BRANCH_LIKELY (fragp->fr_subtype),
                             RELAX_BRANCH_LINK (fragp->fr_subtype),
                             toofar);
@@ -14555,8 +14559,11 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
            }
          else
            {
+             unsigned long at = RELAX_BRANCH_AT (fragp->fr_subtype);
+
              /* lw/ld $at, <sym>($gp)  R_MIPS_GOT16 */
-             insn = HAVE_64BIT_ADDRESSES ? 0xdf810000 : 0x8f810000;
+             insn = HAVE_64BIT_ADDRESSES ? 0xdf800000 : 0x8f800000;
+             insn |= at << OP_SH_RT;
              exp.X_op = O_symbol;
              exp.X_add_symbol = fragp->fr_symbol;
              exp.X_add_number = fragp->fr_offset;
@@ -14583,7 +14590,8 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
                }
 
              /* d/addiu $at, $at, <sym>  R_MIPS_LO16 */
-             insn = HAVE_64BIT_ADDRESSES ? 0x64210000 : 0x24210000;
+             insn = HAVE_64BIT_ADDRESSES ? 0x64000000 : 0x24000000;
+             insn |= at << OP_SH_RS | at << OP_SH_RT;
 
              fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
                                  4, &exp, FALSE, BFD_RELOC_LO16);
@@ -14595,9 +14603,10 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
 
              /* j(al)r $at.  */
              if (RELAX_BRANCH_LINK (fragp->fr_subtype))
-               insn = 0x0020f809;
+               insn = 0x0000f809;
              else
-               insn = 0x00200008;
+               insn = 0x00000008;
+             insn |= at << OP_SH_RS;
 
              md_number_to_chars ((char *) buf, insn, 4);
              buf += 4;
index 1b0dfde83275b2ce1215ecd895c8acbd2b7bacd9..564e6279e6ca816da675357f4e0ae1fe52929b53 100644 (file)
@@ -1,3 +1,13 @@
+2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * gas/mips/relax-at.d: New test for branch relaxation with .set
+       at.
+       * gas/mips/relax.s: Update to support the new test.
+       * gas/mips/relax.l: Update accordingly.
+       * gas/mips/relax.d: Update for multi-arch invocation.
+       * gas/mips/mips.exp: Run the new test.  Adjust to run "relax"
+       across all applicable architectures.
+
 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * gas/mips/branch-misc-2.d: Adjust for relocation change.
index ad11f0225ec6cb60a74961db618eafcd9f002c92..67ee44c7e963b3e3c7c6e387c69a6c5dc5d54763 100644 (file)
@@ -702,7 +702,8 @@ if { [istarget mips*-*-vxworks*] } {
        run_dump_test "xlr-ext"
     }
 
-    run_dump_test "relax"
+    run_dump_test_arches "relax"       [mips_arch_list_matching mips2]
+    run_dump_test_arches "relax-at"    [mips_arch_list_matching mips2]
     run_dump_test "relax-swap1-mips1"
     run_dump_test "relax-swap1-mips2"
     run_dump_test "relax-swap2"
diff --git a/gas/testsuite/gas/mips/relax-at.d b/gas/testsuite/gas/mips/relax-at.d
new file mode 100644 (file)
index 0000000..907069e
--- /dev/null
@@ -0,0 +1,396 @@
+#as: -KPIC -32 -relax-branch --defsym atk0=1
+#objdump: -dr --prefix-addresses
+#name: MIPS relax with .set at
+#stderr: relax.l
+#source: relax.s
+
+# Test relaxation with .set at.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+00000000 <foo> lw      k0,2\(gp\)
+                       0: R_MIPS_GOT16 \.text
+00000004 <foo\+0x4> addiu      k0,k0,592
+                       4: R_MIPS_LO16  \.text
+00000008 <foo\+0x8> jr k0
+0000000c <foo\+0xc> nop
+00000010 <foo\+0x10> lw        k0,2\(gp\)
+                       10: R_MIPS_GOT16        \.text
+00000014 <foo\+0x14> addiu     k0,k0,592
+                       14: R_MIPS_LO16 \.text
+00000018 <foo\+0x18> jalr      k0
+0000001c <foo\+0x1c> nop
+00000020 <foo\+0x20> bne       v0,v1,00000034 <foo\+0x34>
+00000024 <foo\+0x24> nop
+00000028 <foo\+0x28> lw        k0,2\(gp\)
+                       28: R_MIPS_GOT16        \.text
+0000002c <foo\+0x2c> addiu     k0,k0,592
+                       2c: R_MIPS_LO16 \.text
+00000030 <foo\+0x30> jr        k0
+00000034 <foo\+0x34> nop
+00000038 <foo\+0x38> beq       a0,a1,0000004c <foo\+0x4c>
+0000003c <foo\+0x3c> nop
+00000040 <foo\+0x40> lw        k0,2\(gp\)
+                       40: R_MIPS_GOT16        \.text
+00000044 <foo\+0x44> addiu     k0,k0,592
+                       44: R_MIPS_LO16 \.text
+00000048 <foo\+0x48> jr        k0
+0000004c <foo\+0x4c> nop
+00000050 <foo\+0x50> bgtz      v0,00000064 <foo\+0x64>
+00000054 <foo\+0x54> nop
+00000058 <foo\+0x58> lw        k0,2\(gp\)
+                       58: R_MIPS_GOT16        \.text
+0000005c <foo\+0x5c> addiu     k0,k0,592
+                       5c: R_MIPS_LO16 \.text
+00000060 <foo\+0x60> jr        k0
+00000064 <foo\+0x64> nop
+00000068 <foo\+0x68> blez      v1,0000007c <foo\+0x7c>
+0000006c <foo\+0x6c> nop
+00000070 <foo\+0x70> lw        k0,2\(gp\)
+                       70: R_MIPS_GOT16        \.text
+00000074 <foo\+0x74> addiu     k0,k0,592
+                       74: R_MIPS_LO16 \.text
+00000078 <foo\+0x78> jr        k0
+0000007c <foo\+0x7c> nop
+00000080 <foo\+0x80> bgez      a0,00000094 <foo\+0x94>
+00000084 <foo\+0x84> nop
+00000088 <foo\+0x88> lw        k0,2\(gp\)
+                       88: R_MIPS_GOT16        \.text
+0000008c <foo\+0x8c> addiu     k0,k0,592
+                       8c: R_MIPS_LO16 \.text
+00000090 <foo\+0x90> jr        k0
+00000094 <foo\+0x94> nop
+00000098 <foo\+0x98> bltz      a1,000000ac <foo\+0xac>
+0000009c <foo\+0x9c> nop
+000000a0 <foo\+0xa0> lw        k0,2\(gp\)
+                       a0: R_MIPS_GOT16        \.text
+000000a4 <foo\+0xa4> addiu     k0,k0,592
+                       a4: R_MIPS_LO16 \.text
+000000a8 <foo\+0xa8> jr        k0
+000000ac <foo\+0xac> nop
+000000b0 <foo\+0xb0> bc1t      000000c4 <foo\+0xc4>
+000000b4 <foo\+0xb4> nop
+000000b8 <foo\+0xb8> lw        k0,2\(gp\)
+                       b8: R_MIPS_GOT16        \.text
+000000bc <foo\+0xbc> addiu     k0,k0,592
+                       bc: R_MIPS_LO16 \.text
+000000c0 <foo\+0xc0> jr        k0
+000000c4 <foo\+0xc4> nop
+000000c8 <foo\+0xc8> bc1f      000000dc <foo\+0xdc>
+000000cc <foo\+0xcc> nop
+000000d0 <foo\+0xd0> lw        k0,2\(gp\)
+                       d0: R_MIPS_GOT16        \.text
+000000d4 <foo\+0xd4> addiu     k0,k0,592
+                       d4: R_MIPS_LO16 \.text
+000000d8 <foo\+0xd8> jr        k0
+000000dc <foo\+0xdc> nop
+000000e0 <foo\+0xe0> bgez      v0,000000f4 <foo\+0xf4>
+000000e4 <foo\+0xe4> nop
+000000e8 <foo\+0xe8> lw        k0,2\(gp\)
+                       e8: R_MIPS_GOT16        \.text
+000000ec <foo\+0xec> addiu     k0,k0,592
+                       ec: R_MIPS_LO16 \.text
+000000f0 <foo\+0xf0> jalr      k0
+000000f4 <foo\+0xf4> nop
+000000f8 <foo\+0xf8> bltz      v1,0000010c <foo\+0x10c>
+000000fc <foo\+0xfc> nop
+00000100 <foo\+0x100> lw       k0,2\(gp\)
+                       100: R_MIPS_GOT16       \.text
+00000104 <foo\+0x104> addiu    k0,k0,592
+                       104: R_MIPS_LO16        \.text
+00000108 <foo\+0x108> jalr     k0
+0000010c <foo\+0x10c> nop
+00000110 <foo\+0x110> beql     v0,v1,00000120 <foo\+0x120>
+00000114 <foo\+0x114> nop
+00000118 <foo\+0x118> beqzl    zero,00000130 <foo\+0x130>
+0000011c <foo\+0x11c> nop
+00000120 <foo\+0x120> lw       k0,2\(gp\)
+                       120: R_MIPS_GOT16       \.text
+00000124 <foo\+0x124> addiu    k0,k0,592
+                       124: R_MIPS_LO16        \.text
+00000128 <foo\+0x128> jr       k0
+0000012c <foo\+0x12c> nop
+00000130 <foo\+0x130> bnel     a0,a1,00000140 <foo\+0x140>
+00000134 <foo\+0x134> nop
+00000138 <foo\+0x138> beqzl    zero,00000150 <foo\+0x150>
+0000013c <foo\+0x13c> nop
+00000140 <foo\+0x140> lw       k0,2\(gp\)
+                       140: R_MIPS_GOT16       \.text
+00000144 <foo\+0x144> addiu    k0,k0,592
+                       144: R_MIPS_LO16        \.text
+00000148 <foo\+0x148> jr       k0
+0000014c <foo\+0x14c> nop
+00000150 <foo\+0x150> blezl    v0,00000160 <foo\+0x160>
+00000154 <foo\+0x154> nop
+00000158 <foo\+0x158> beqzl    zero,00000170 <foo\+0x170>
+0000015c <foo\+0x15c> nop
+00000160 <foo\+0x160> lw       k0,2\(gp\)
+                       160: R_MIPS_GOT16       \.text
+00000164 <foo\+0x164> addiu    k0,k0,592
+                       164: R_MIPS_LO16        \.text
+00000168 <foo\+0x168> jr       k0
+0000016c <foo\+0x16c> nop
+00000170 <foo\+0x170> bgtzl    v1,00000180 <foo\+0x180>
+00000174 <foo\+0x174> nop
+00000178 <foo\+0x178> beqzl    zero,00000190 <foo\+0x190>
+0000017c <foo\+0x17c> nop
+00000180 <foo\+0x180> lw       k0,2\(gp\)
+                       180: R_MIPS_GOT16       \.text
+00000184 <foo\+0x184> addiu    k0,k0,592
+                       184: R_MIPS_LO16        \.text
+00000188 <foo\+0x188> jr       k0
+0000018c <foo\+0x18c> nop
+00000190 <foo\+0x190> bltzl    a0,000001a0 <foo\+0x1a0>
+00000194 <foo\+0x194> nop
+00000198 <foo\+0x198> beqzl    zero,000001b0 <foo\+0x1b0>
+0000019c <foo\+0x19c> nop
+000001a0 <foo\+0x1a0> lw       k0,2\(gp\)
+                       1a0: R_MIPS_GOT16       \.text
+000001a4 <foo\+0x1a4> addiu    k0,k0,592
+                       1a4: R_MIPS_LO16        \.text
+000001a8 <foo\+0x1a8> jr       k0
+000001ac <foo\+0x1ac> nop
+000001b0 <foo\+0x1b0> bgezl    a1,000001c0 <foo\+0x1c0>
+000001b4 <foo\+0x1b4> nop
+000001b8 <foo\+0x1b8> beqzl    zero,000001d0 <foo\+0x1d0>
+000001bc <foo\+0x1bc> nop
+000001c0 <foo\+0x1c0> lw       k0,2\(gp\)
+                       1c0: R_MIPS_GOT16       \.text
+000001c4 <foo\+0x1c4> addiu    k0,k0,592
+                       1c4: R_MIPS_LO16        \.text
+000001c8 <foo\+0x1c8> jr       k0
+000001cc <foo\+0x1cc> nop
+000001d0 <foo\+0x1d0> bc1fl    000001e0 <foo\+0x1e0>
+000001d4 <foo\+0x1d4> nop
+000001d8 <foo\+0x1d8> beqzl    zero,000001f0 <foo\+0x1f0>
+000001dc <foo\+0x1dc> nop
+000001e0 <foo\+0x1e0> lw       k0,2\(gp\)
+                       1e0: R_MIPS_GOT16       \.text
+000001e4 <foo\+0x1e4> addiu    k0,k0,592
+                       1e4: R_MIPS_LO16        \.text
+000001e8 <foo\+0x1e8> jr       k0
+000001ec <foo\+0x1ec> nop
+000001f0 <foo\+0x1f0> bc1tl    00000200 <foo\+0x200>
+000001f4 <foo\+0x1f4> nop
+000001f8 <foo\+0x1f8> beqzl    zero,00000210 <foo\+0x210>
+000001fc <foo\+0x1fc> nop
+00000200 <foo\+0x200> lw       k0,2\(gp\)
+                       200: R_MIPS_GOT16       \.text
+00000204 <foo\+0x204> addiu    k0,k0,592
+                       204: R_MIPS_LO16        \.text
+00000208 <foo\+0x208> jr       k0
+0000020c <foo\+0x20c> nop
+00000210 <foo\+0x210> bltzl    v0,00000220 <foo\+0x220>
+00000214 <foo\+0x214> nop
+00000218 <foo\+0x218> beqzl    zero,00000230 <foo\+0x230>
+0000021c <foo\+0x21c> nop
+00000220 <foo\+0x220> lw       k0,2\(gp\)
+                       220: R_MIPS_GOT16       \.text
+00000224 <foo\+0x224> addiu    k0,k0,592
+                       224: R_MIPS_LO16        \.text
+00000228 <foo\+0x228> jalr     k0
+0000022c <foo\+0x22c> nop
+00000230 <foo\+0x230> bgezl    v1,00000240 <foo\+0x240>
+00000234 <foo\+0x234> nop
+00000238 <foo\+0x238> beqzl    zero,00000250 <foo\+0x250>
+0000023c <foo\+0x23c> nop
+00000240 <foo\+0x240> lw       k0,2\(gp\)
+                       240: R_MIPS_GOT16       \.text
+00000244 <foo\+0x244> addiu    k0,k0,592
+                       244: R_MIPS_LO16        \.text
+00000248 <foo\+0x248> jalr     k0
+0000024c <foo\+0x24c> nop
+       \.\.\.
+00020250 <bar> lw      k0,0\(gp\)
+                       20250: R_MIPS_GOT16     \.text
+00020254 <bar\+0x4> addiu      k0,k0,0
+                       20254: R_MIPS_LO16      \.text
+00020258 <bar\+0x8> jr k0
+0002025c <bar\+0xc> nop
+00020260 <bar\+0x10> lw        k0,0\(gp\)
+                       20260: R_MIPS_GOT16     \.text
+00020264 <bar\+0x14> addiu     k0,k0,0
+                       20264: R_MIPS_LO16      \.text
+00020268 <bar\+0x18> jalr      k0
+0002026c <bar\+0x1c> nop
+00020270 <bar\+0x20> bne       v0,v1,00020284 <bar\+0x34>
+00020274 <bar\+0x24> nop
+00020278 <bar\+0x28> lw        k0,0\(gp\)
+                       20278: R_MIPS_GOT16     \.text
+0002027c <bar\+0x2c> addiu     k0,k0,0
+                       2027c: R_MIPS_LO16      \.text
+00020280 <bar\+0x30> jr        k0
+00020284 <bar\+0x34> nop
+00020288 <bar\+0x38> beq       a0,a1,0002029c <bar\+0x4c>
+0002028c <bar\+0x3c> nop
+00020290 <bar\+0x40> lw        k0,0\(gp\)
+                       20290: R_MIPS_GOT16     \.text
+00020294 <bar\+0x44> addiu     k0,k0,0
+                       20294: R_MIPS_LO16      \.text
+00020298 <bar\+0x48> jr        k0
+0002029c <bar\+0x4c> nop
+000202a0 <bar\+0x50> bgtz      v0,000202b4 <bar\+0x64>
+000202a4 <bar\+0x54> nop
+000202a8 <bar\+0x58> lw        k0,0\(gp\)
+                       202a8: R_MIPS_GOT16     \.text
+000202ac <bar\+0x5c> addiu     k0,k0,0
+                       202ac: R_MIPS_LO16      \.text
+000202b0 <bar\+0x60> jr        k0
+000202b4 <bar\+0x64> nop
+000202b8 <bar\+0x68> blez      v1,000202cc <bar\+0x7c>
+000202bc <bar\+0x6c> nop
+000202c0 <bar\+0x70> lw        k0,0\(gp\)
+                       202c0: R_MIPS_GOT16     \.text
+000202c4 <bar\+0x74> addiu     k0,k0,0
+                       202c4: R_MIPS_LO16      \.text
+000202c8 <bar\+0x78> jr        k0
+000202cc <bar\+0x7c> nop
+000202d0 <bar\+0x80> bgez      a0,000202e4 <bar\+0x94>
+000202d4 <bar\+0x84> nop
+000202d8 <bar\+0x88> lw        k0,0\(gp\)
+                       202d8: R_MIPS_GOT16     \.text
+000202dc <bar\+0x8c> addiu     k0,k0,0
+                       202dc: R_MIPS_LO16      \.text
+000202e0 <bar\+0x90> jr        k0
+000202e4 <bar\+0x94> nop
+000202e8 <bar\+0x98> bltz      a1,000202fc <bar\+0xac>
+000202ec <bar\+0x9c> nop
+000202f0 <bar\+0xa0> lw        k0,0\(gp\)
+                       202f0: R_MIPS_GOT16     \.text
+000202f4 <bar\+0xa4> addiu     k0,k0,0
+                       202f4: R_MIPS_LO16      \.text
+000202f8 <bar\+0xa8> jr        k0
+000202fc <bar\+0xac> nop
+00020300 <bar\+0xb0> bc1t      00020314 <bar\+0xc4>
+00020304 <bar\+0xb4> nop
+00020308 <bar\+0xb8> lw        k0,0\(gp\)
+                       20308: R_MIPS_GOT16     \.text
+0002030c <bar\+0xbc> addiu     k0,k0,0
+                       2030c: R_MIPS_LO16      \.text
+00020310 <bar\+0xc0> jr        k0
+00020314 <bar\+0xc4> nop
+00020318 <bar\+0xc8> bc1f      0002032c <bar\+0xdc>
+0002031c <bar\+0xcc> nop
+00020320 <bar\+0xd0> lw        k0,0\(gp\)
+                       20320: R_MIPS_GOT16     \.text
+00020324 <bar\+0xd4> addiu     k0,k0,0
+                       20324: R_MIPS_LO16      \.text
+00020328 <bar\+0xd8> jr        k0
+0002032c <bar\+0xdc> nop
+00020330 <bar\+0xe0> bgez      v0,00020344 <bar\+0xf4>
+00020334 <bar\+0xe4> nop
+00020338 <bar\+0xe8> lw        k0,0\(gp\)
+                       20338: R_MIPS_GOT16     \.text
+0002033c <bar\+0xec> addiu     k0,k0,0
+                       2033c: R_MIPS_LO16      \.text
+00020340 <bar\+0xf0> jalr      k0
+00020344 <bar\+0xf4> nop
+00020348 <bar\+0xf8> bltz      v1,0002035c <bar\+0x10c>
+0002034c <bar\+0xfc> nop
+00020350 <bar\+0x100> lw       k0,0\(gp\)
+                       20350: R_MIPS_GOT16     \.text
+00020354 <bar\+0x104> addiu    k0,k0,0
+                       20354: R_MIPS_LO16      \.text
+00020358 <bar\+0x108> jalr     k0
+0002035c <bar\+0x10c> nop
+00020360 <bar\+0x110> beql     v0,v1,00020370 <bar\+0x120>
+00020364 <bar\+0x114> nop
+00020368 <bar\+0x118> beqzl    zero,00020380 <bar\+0x130>
+0002036c <bar\+0x11c> nop
+00020370 <bar\+0x120> lw       k0,0\(gp\)
+                       20370: R_MIPS_GOT16     \.text
+00020374 <bar\+0x124> addiu    k0,k0,0
+                       20374: R_MIPS_LO16      \.text
+00020378 <bar\+0x128> jr       k0
+0002037c <bar\+0x12c> nop
+00020380 <bar\+0x130> bnel     a0,a1,00020390 <bar\+0x140>
+00020384 <bar\+0x134> nop
+00020388 <bar\+0x138> beqzl    zero,000203a0 <bar\+0x150>
+0002038c <bar\+0x13c> nop
+00020390 <bar\+0x140> lw       k0,0\(gp\)
+                       20390: R_MIPS_GOT16     \.text
+00020394 <bar\+0x144> addiu    k0,k0,0
+                       20394: R_MIPS_LO16      \.text
+00020398 <bar\+0x148> jr       k0
+0002039c <bar\+0x14c> nop
+000203a0 <bar\+0x150> blezl    v0,000203b0 <bar\+0x160>
+000203a4 <bar\+0x154> nop
+000203a8 <bar\+0x158> beqzl    zero,000203c0 <bar\+0x170>
+000203ac <bar\+0x15c> nop
+000203b0 <bar\+0x160> lw       k0,0\(gp\)
+                       203b0: R_MIPS_GOT16     \.text
+000203b4 <bar\+0x164> addiu    k0,k0,0
+                       203b4: R_MIPS_LO16      \.text
+000203b8 <bar\+0x168> jr       k0
+000203bc <bar\+0x16c> nop
+000203c0 <bar\+0x170> bgtzl    v1,000203d0 <bar\+0x180>
+000203c4 <bar\+0x174> nop
+000203c8 <bar\+0x178> beqzl    zero,000203e0 <bar\+0x190>
+000203cc <bar\+0x17c> nop
+000203d0 <bar\+0x180> lw       k0,0\(gp\)
+                       203d0: R_MIPS_GOT16     \.text
+000203d4 <bar\+0x184> addiu    k0,k0,0
+                       203d4: R_MIPS_LO16      \.text
+000203d8 <bar\+0x188> jr       k0
+000203dc <bar\+0x18c> nop
+000203e0 <bar\+0x190> bltzl    a0,000203f0 <bar\+0x1a0>
+000203e4 <bar\+0x194> nop
+000203e8 <bar\+0x198> beqzl    zero,00020400 <bar\+0x1b0>
+000203ec <bar\+0x19c> nop
+000203f0 <bar\+0x1a0> lw       k0,0\(gp\)
+                       203f0: R_MIPS_GOT16     \.text
+000203f4 <bar\+0x1a4> addiu    k0,k0,0
+                       203f4: R_MIPS_LO16      \.text
+000203f8 <bar\+0x1a8> jr       k0
+000203fc <bar\+0x1ac> nop
+00020400 <bar\+0x1b0> bgezl    a1,00020410 <bar\+0x1c0>
+00020404 <bar\+0x1b4> nop
+00020408 <bar\+0x1b8> beqzl    zero,00020420 <bar\+0x1d0>
+0002040c <bar\+0x1bc> nop
+00020410 <bar\+0x1c0> lw       k0,0\(gp\)
+                       20410: R_MIPS_GOT16     \.text
+00020414 <bar\+0x1c4> addiu    k0,k0,0
+                       20414: R_MIPS_LO16      \.text
+00020418 <bar\+0x1c8> jr       k0
+0002041c <bar\+0x1cc> nop
+00020420 <bar\+0x1d0> bc1fl    00020430 <bar\+0x1e0>
+00020424 <bar\+0x1d4> nop
+00020428 <bar\+0x1d8> beqzl    zero,00020440 <bar\+0x1f0>
+0002042c <bar\+0x1dc> nop
+00020430 <bar\+0x1e0> lw       k0,0\(gp\)
+                       20430: R_MIPS_GOT16     \.text
+00020434 <bar\+0x1e4> addiu    k0,k0,0
+                       20434: R_MIPS_LO16      \.text
+00020438 <bar\+0x1e8> jr       k0
+0002043c <bar\+0x1ec> nop
+00020440 <bar\+0x1f0> bc1tl    00020450 <bar\+0x200>
+00020444 <bar\+0x1f4> nop
+00020448 <bar\+0x1f8> beqzl    zero,00020460 <bar\+0x210>
+0002044c <bar\+0x1fc> nop
+00020450 <bar\+0x200> lw       k0,0\(gp\)
+                       20450: R_MIPS_GOT16     \.text
+00020454 <bar\+0x204> addiu    k0,k0,0
+                       20454: R_MIPS_LO16      \.text
+00020458 <bar\+0x208> jr       k0
+0002045c <bar\+0x20c> nop
+00020460 <bar\+0x210> bltzl    v0,00020470 <bar\+0x220>
+00020464 <bar\+0x214> nop
+00020468 <bar\+0x218> beqzl    zero,00020480 <bar\+0x230>
+0002046c <bar\+0x21c> nop
+00020470 <bar\+0x220> lw       k0,0\(gp\)
+                       20470: R_MIPS_GOT16     \.text
+00020474 <bar\+0x224> addiu    k0,k0,0
+                       20474: R_MIPS_LO16      \.text
+00020478 <bar\+0x228> jalr     k0
+0002047c <bar\+0x22c> nop
+00020480 <bar\+0x230> bgezl    v1,00020490 <bar\+0x240>
+00020484 <bar\+0x234> nop
+00020488 <bar\+0x238> beqzl    zero,000204a0 <bar\+0x250>
+0002048c <bar\+0x23c> nop
+00020490 <bar\+0x240> lw       k0,0\(gp\)
+                       20490: R_MIPS_GOT16     \.text
+00020494 <bar\+0x244> addiu    k0,k0,0
+                       20494: R_MIPS_LO16      \.text
+00020498 <bar\+0x248> jalr     k0
+0002049c <bar\+0x24c> nop
index c8d404e8e23cd2837853d43495ca799efc08117c..9d69c8af174cdc1b8b4e8d694a9ca341a24ceb24 100644 (file)
@@ -1,5 +1,5 @@
-#as: -KPIC -mips3 -32 -relax-branch
-#objdump: -dr --prefix-addresses -mmips:4000
+#as: -KPIC -32 -relax-branch
+#objdump: -dr --prefix-addresses
 #name: MIPS relax
 #stderr: relax.l
 
index 895aba1f356bd6af63b53bb0d696eabb4fb0023d..0e5004bf20f7655321b2904d85fe493e4e31a202 100644 (file)
@@ -1,45 +1,45 @@
 .*: Assembler messages:
-.*:5: Warning: Relaxed out-of-range branch into a jump
-.*:6: Warning: Relaxed out-of-range branch into a jump
-.*:7: Warning: Relaxed out-of-range branch into a jump
-.*:8: Warning: Relaxed out-of-range branch into a jump
 .*:9: Warning: Relaxed out-of-range branch into a jump
 .*:10: Warning: Relaxed out-of-range branch into a jump
 .*:11: Warning: Relaxed out-of-range branch into a jump
 .*:12: Warning: Relaxed out-of-range branch into a jump
 .*:13: Warning: Relaxed out-of-range branch into a jump
 .*:14: Warning: Relaxed out-of-range branch into a jump
+.*:15: Warning: Relaxed out-of-range branch into a jump
 .*:16: Warning: Relaxed out-of-range branch into a jump
 .*:17: Warning: Relaxed out-of-range branch into a jump
-.*:19: Warning: Relaxed out-of-range branch into a jump
+.*:18: Warning: Relaxed out-of-range branch into a jump
 .*:20: Warning: Relaxed out-of-range branch into a jump
 .*:21: Warning: Relaxed out-of-range branch into a jump
-.*:22: Warning: Relaxed out-of-range branch into a jump
 .*:23: Warning: Relaxed out-of-range branch into a jump
 .*:24: Warning: Relaxed out-of-range branch into a jump
 .*:25: Warning: Relaxed out-of-range branch into a jump
 .*:26: Warning: Relaxed out-of-range branch into a jump
+.*:27: Warning: Relaxed out-of-range branch into a jump
 .*:28: Warning: Relaxed out-of-range branch into a jump
 .*:29: Warning: Relaxed out-of-range branch into a jump
+.*:30: Warning: Relaxed out-of-range branch into a jump
+.*:32: Warning: Relaxed out-of-range branch into a jump
 .*:33: Warning: Relaxed out-of-range branch into a jump
-.*:34: Warning: Relaxed out-of-range branch into a jump
-.*:35: Warning: Relaxed out-of-range branch into a jump
-.*:36: Warning: Relaxed out-of-range branch into a jump
 .*:37: Warning: Relaxed out-of-range branch into a jump
 .*:38: Warning: Relaxed out-of-range branch into a jump
 .*:39: Warning: Relaxed out-of-range branch into a jump
 .*:40: Warning: Relaxed out-of-range branch into a jump
 .*:41: Warning: Relaxed out-of-range branch into a jump
 .*:42: Warning: Relaxed out-of-range branch into a jump
+.*:43: Warning: Relaxed out-of-range branch into a jump
 .*:44: Warning: Relaxed out-of-range branch into a jump
 .*:45: Warning: Relaxed out-of-range branch into a jump
-.*:47: Warning: Relaxed out-of-range branch into a jump
+.*:46: Warning: Relaxed out-of-range branch into a jump
 .*:48: Warning: Relaxed out-of-range branch into a jump
 .*:49: Warning: Relaxed out-of-range branch into a jump
-.*:50: Warning: Relaxed out-of-range branch into a jump
 .*:51: Warning: Relaxed out-of-range branch into a jump
 .*:52: Warning: Relaxed out-of-range branch into a jump
 .*:53: Warning: Relaxed out-of-range branch into a jump
 .*:54: Warning: Relaxed out-of-range branch into a jump
+.*:55: Warning: Relaxed out-of-range branch into a jump
 .*:56: Warning: Relaxed out-of-range branch into a jump
 .*:57: Warning: Relaxed out-of-range branch into a jump
+.*:58: Warning: Relaxed out-of-range branch into a jump
+.*:60: Warning: Relaxed out-of-range branch into a jump
+.*:61: Warning: Relaxed out-of-range branch into a jump
index 6424b3b7b347b5886ff7e6d8cdbfcf645afa51aa..e8fcc2a57ba8fdac46b43f4d1053261be89ca777 100644 (file)
@@ -1,5 +1,9 @@
 # Source file used to test relaxation.
 
+       .ifdef  atk0
+       .set    at=$k0
+       .endif
+
        .text
 foo:
        b       bar