+2007-05-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/i386.c (ix86_handle_option): Handle SSE4.1 for
+ -msse/-msse2/-msse3.
+
2007-05-24 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Mark
if (!value)
{
target_flags &= ~(MASK_SSE2 | MASK_SSE3 | MASK_SSSE3
- | MASK_SSE4A);
+ | MASK_SSE4_1 | MASK_SSE4A);
target_flags_explicit |= (MASK_SSE2 | MASK_SSE3 | MASK_SSSE3
- | MASK_SSE4A);
+ | MASK_SSE4_1 | MASK_SSE4A);
}
return true;
case OPT_msse2:
if (!value)
{
- target_flags &= ~(MASK_SSE3 | MASK_SSSE3 | MASK_SSE4A);
- target_flags_explicit |= MASK_SSE3 | MASK_SSSE3 | MASK_SSE4A;
+ target_flags &= ~(MASK_SSE3 | MASK_SSSE3 | MASK_SSE4_1
+ | MASK_SSE4A);
+ target_flags_explicit |= (MASK_SSE3 | MASK_SSSE3
+ | MASK_SSE4_1 | MASK_SSE4A);
}
return true;
case OPT_msse3:
if (!value)
{
- target_flags &= ~(MASK_SSSE3 | MASK_SSE4A);
- target_flags_explicit |= MASK_SSSE3 | MASK_SSE4A;
+ target_flags &= ~(MASK_SSSE3 | MASK_SSE4_1 | MASK_SSE4A);
+ target_flags_explicit |= (MASK_SSSE3 | MASK_SSE4_1
+ | MASK_SSE4A);
}
return true;