sse.md (round<mode>2): Use register_operand for operand 1 predicate.

	* config/i386/sse.md (round<mode>2): Use register_operand for
	operand 1 predicate.
	(round<mode>2_sfix): Ditto.
	(round<mode>2_vec_pack_sfix): Ditto for operand 1 and operand 2.

From-SVN: r181369

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 94661b5d61d74337fd863e243c4181153271d83d..539d836aee8ad6d5f8e9b078556e8e419cab4bdd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,9 +1,17 @@
+2011-11-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sse.md (round<mode>2): Use register_operand for
+       operand 1 predicate.
+       (round<mode>2_sfix): Ditto.
+       (round<mode>2_vec_pack_sfix): Ditto for operand 1 and operand 2.
+
 2011-11-14  Nathan Sidwell  <nathan@acm.org>
 
        * gcov.c (canonicalize_name): Protect use of S_ISLNK.
 
 2011-11-14  Jan Hubicka  <jh@suse.cz>
 
+       PR target/51126
        * config/i386/i386.c (core cost model): Correct pasto.
 
 2011-11-14  Uros Bizjak  <ubizjak@gmail.com>

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 147646bb20bdbe79d5c99d01155bb923e4518b89..b476752d6538329e166128b3b13b13eb31900d5d 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -9965,7 +9965,7 @@
 (define_expand "round<mode>2"
   [(set (match_dup 4)
        (plus:VF
-         (match_operand:VF 1 "nonimmediate_operand" "")
+         (match_operand:VF 1 "register_operand" "")
          (match_dup 3)))
    (set (match_operand:VF 0 "register_operand" "")
        (unspec:VF
@@ -9998,7 +9998,7 @@
 
 (define_expand "round<mode>2_sfix"
   [(match_operand:<sseintvecmode> 0 "register_operand" "")
-   (match_operand:VF1 1 "nonimmediate_operand" "")]
+   (match_operand:VF1 1 "register_operand" "")]
   "TARGET_ROUND && !flag_trapping_math"
 {
   rtx tmp = gen_reg_rtx (<MODE>mode);
@@ -10012,8 +10012,8 @@
 
 (define_expand "round<mode>2_vec_pack_sfix"
   [(match_operand:<ssepackfltmode> 0 "register_operand" "")
-   (match_operand:VF2 1 "nonimmediate_operand" "")
-   (match_operand:VF2 2 "nonimmediate_operand" "")]
+   (match_operand:VF2 1 "register_operand" "")
+   (match_operand:VF2 2 "register_operand" "")]
   "TARGET_ROUND && !flag_trapping_math"
 {
   rtx tmp0, tmp1;