clarify bf16 vs fp16

diff --git a/openpower/sv/rfc/ls005.mdwn b/openpower/sv/rfc/ls005.mdwn
index f449ff4f92ca0430478901b9ffd22210677a65f1..ac1870cb5e2ca751053a6b05f6b0c00d20f690b7 100644 (file)
--- a/openpower/sv/rfc/ls005.mdwn
+++ b/openpower/sv/rfc/ls005.mdwn
@@ -105,10 +105,12 @@ the FP width".
   "half width" exactly as presently defined.
 * XLEN=32 overrides FPR "full width" operations to
   full FP32, and "half width" to be "FP16 stored in an FP32"
-* XLEN=16 redefines FPR "full width" operations to full BFP16 and leaves
-  "half width" UNDEFINED (there is no FP8).
-* XLEN=8 redefines FPR "full width" operations to BF16 and leaves
-  "half width" UNDEFINED (there is no BF8).
+* XLEN=16 redefines FPR "full width" operations to full [IEEE FP16](https://en.wikipedia.org/wiki/Half-precision_floating-point_format) and leaves
+  "half width" UNDEFINED (there is no IEEE FP8).
+* XLEN=8 redefines FPR "full width" operations to [BF16 (bfloat16)](https://en.wikipedia.org/wiki/Bfloat16_floating-point_format) and leaves
+  "half width" UNDEFINED[^1]. Note this means FPRs are 16 bits, not 8.
+
+[^1]: BF8 is very rarely used, though it does exist as the MSB half of IEEE FP16
 
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