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passes/hierarchy: delete some dead code
author
Austin Seipp
<aseipp@pobox.com>
Sun, 15 Jan 2017 22:39:12 +0000
(16:39 -0600)
committer
Austin Seipp
<aseipp@pobox.com>
Sun, 15 Jan 2017 22:39:12 +0000
(16:39 -0600)
Signed-off-by: Austin Seipp <aseipp@pobox.com>
passes/hierarchy/hierarchy.cc
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diff --git
a/passes/hierarchy/hierarchy.cc
b/passes/hierarchy/hierarchy.cc
index 337af7fd7cbbb820c56009fc2d39e5743bf8b1e4..f1c4a1d3be23ac4ef3bdf065a6609544f0ca390c 100644
(file)
--- a/
passes/hierarchy/hierarchy.cc
+++ b/
passes/hierarchy/hierarchy.cc
@@
-175,16
+175,12
@@
bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check
{
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ".v";
if (check_file_exists(filename)) {
- std::vector<std::string> args;
- args.push_back(filename);
Frontend::frontend_call(design, NULL, filename, "verilog");
goto loaded_module;
}
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ".il";
if (check_file_exists(filename)) {
- std::vector<std::string> args;
- args.push_back(filename);
Frontend::frontend_call(design, NULL, filename, "ilang");
goto loaded_module;
}